Insertion

N-path+Filtering

his research aims at creating broadband tunable, fully integrated filters for the application of cognitive radio and signal classification receivers. The approach under study is the N-path filter technique which is capable of translating a baseband impedance to a reference frequency creating a tunable filter. The traditional N-path filter suffers from fundamental architectural limitations, namely : a trade-off between Insertion loss and out-of-band rejection, reference clock feed- through, and jammer power handling limitations. In the first approach, the fundamental trade- off of the traditional N-path filter between Insertion loss and out-of-band rejection is improved by a transmission line (T-line) N-path filter technique.

标签： Filtering N-path

上传时间： 2020-05-31

上传用户：shancjb
I2C热插拔和SMBus缓冲器

The NCA9511 is a hot-swappable I2C bus buffer that supports I/O card Insertion into a live backplane without corruption of the data and clock buses.

标签： SMBus I2C 热插拔缓冲器

上传时间： 2021-01-26

上传用户：
CPU可测试性设计

可测试性设计（Design-For-Testability，DFT）已经成为芯片设计中不可或缺的重要组成部分。它通过在芯片的逻辑设计中加入测试逻辑提高芯片的可测试性。在高性能通用 CPU 的设计中，可测试性设计技术得到了广泛的应用。本文结合几款流行的 CPU，综述了可应用于通用 CPU 等高性能芯片设计中的各种可测试性方法，包括扫描设计（Scan Design），内建自测试（Built-In Self-Test，BIST），测试点插入（Test Point Insertion），与 IEEE 1149.1标准兼容的边界扫描设计（Boundary Scan Design，BSD）等技术。

标签： 可测试性设计 CPU

上传时间： 2021-10-15

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