8051 Serial I/O Routines Ring buffered, INTERRUPT-DRIVEN UART driver, written in Keil C .
标签： INTERRUPT-DRIVEN Routines buffered written
上传时间： 2013-11-27
上传用户：330402686
LPC 2129 BASED INTERRUPT DRIVEN EXAMPLE
标签： INTERRUPT EXAMPLE DRIVEN BASED
上传时间： 2017-04-08
上传用户：fanboynet
This application note shows how to write an Inter Integrated Circuit bus driver (I²C) for the Philips P90CL301micro-controller.It is not only an example of writing a driver, but it also includes a set of application interface software routines toquickly implement a complete I²C multi-master system application.For specific applications the user will have to make minimal changes in the driver program. Using the drivermeans linking modules to your application software and including a header-file into the application sourceprograms. A small example program of how to use the driver is listed.The driver supports i.a. polled or interrupt driven message handling, slave message transfers and multi-mastersystem applications. Furthermore, it is made suitable for use in conjunction with real time operating systems, likepSOS+.
上传时间： 2013-11-23
上传用户：weixiao99
This application note demonstrates how to write an Inter Integrated Circuit bus driver (I2C) for the XA-S3 16-bitMicrocontroller from Philips Semiconductors.Not only the driver software is given. This note also contains a set of (example) interface routines and a smalldemo application program. All together it offers the user a quick start in writing a complete I2C system applicationwith the PXAS3x.The driver routines support interrupt driven single master transfers. Furthermore, the routines are suitable foruse in conjunction with real time operating systems.
上传时间： 2013-11-02
上传用户：zw380105939
CBC下写的串口编程，API函数实例 I wish this site had been around when I was trying to figure out how to make serial communications work in Windows95. I, like many programmers, was hit with the double-whammy of having to learn Windows programming and Win95 serial comm programming at the same time. I found both tasks confusing at best. It was particularly frustrating because I had, over the years, written so much stuff (including lots of serial comm software) for the DOS environment and numerous embedded applications. Interrupt driven serial comm, DMA transfer serial comm, TSR serial comm, C, assembler, various processors... you name it, it had written it. Yet, everything I knew seemed upside-down in the message-driven-callback world of Windows.
上传时间： 2014-06-20
上传用户：cccole0605
This firmware translates a PS/2 mouse to a USB mouse. The translator firmware is entirely interrupt driven (with the exception of sending the data via USB to the host.) An interrupt is generated when the PS/2 start bit is received, at which time the firmware will begin its receive routine. In addition to this interrupt, every 168ms a timer overflow interrupts the main program and implements one state of the mouse state machine. This state machine handles sending bytes to and translating bytes received from the PS/2 mouse automatically. All of this is done in the background while the main program runs in the foreground. The only operation that the main program implements is sending mouse data to the PC via USB.
标签： firmware mouse translates translator
上传时间： 2015-04-26
上传用户：cuiyashuo
This application report describes the use of Timer_A3 to decode RC5 and SIRC TV IR remote control signals. The decoder described in this report is INTERRUPT-DRIVEN and operates a background function using specific features the Timer_A3. Only a small portion of the MSP430 CPU?s nonreal-time resources is used. Specific hardware bit-latching capabilities of the Timer_A3 module are used for real-time decoding of the IR data signal, independent and asynchronous to the CPU. CPU activity and power consumption are kept to an absolute minimum level. The Timer_A3 decoder implementation also allows other tasks to occur simultaneously if required. The solutions provided are written specifically for MSP430x11x(1) and MSP430x12x derivatives, but can be adapted to any other MSP430 incorporating Timer_A3. 電視遙控器設計基於MSP430
标签： application describes Timer_A control
上传时间： 2014-01-01
上传用户：qq21508895
This example demonstrates how the C8051F06x SMBus interface can communicate // with a 256 byte I2C Serial EEPROM (Microchip 24LC02B). // - INTERRUPT-DRIVEN SMBus implementation // - Only master states defined (no slave or arbitration) // - Timer4 used by SMBus for SCL low timeout detection // - SCL frequency defined by <SMB_FREQUENCY> constant
标签： demonstrates communicate C8051F06x interface
上传时间： 2016-04-12
上传用户：hanli8870
RS232.C was written to provide all of the basic functionality needed to employ serial I/O in any application written with Borland C language compilers. Some features are: 1. Ease of use. No assembly language or library files are used and a simple "#include" statement is all that is required to access all of the functions provided. 2. Both input and output are buffered and interrupt driven for efficiency. 3. Serial ports 1 - 4 are supported on PC, AT and PS/2 compatibles.Chained interrupts used on port 3 and 4 are allowed for so as not to interfere with devices such as a mouse or printer. Transmission speeds of 110 to 115200 baud are available. 4. Detection and utilization of hardware buffered UARTs (NS16550AF etc.) found in some machines is automatic. 5. Interrupt driven hardware and XON/XOFF flow control is provided for. 6. All source code is included. RS232.C can be used with all memory models.
标签： functionality provide written employ
上传时间： 2016-08-24
上传用户：小眼睛LSL
The PCA9544A provides 4 interrupt inputs, one for each channeland one open drain interrupt output. When an interrupt is generated byany device, it will be detected by the PCA9544A and the interruptoutput will be driven LOW. The channel need not be active fordetection of the interrupt. A bit is also set in the control byte.Bits 4 – 7 of the control byte correspond to channels 0 – 3 of thePCA9544A, respectively. Therefore, if an interrupt is generated byany device connected to channel 2, the state of the interrupt inputs isloaded into the control register when a read is accomplished.Likewise, an interrupt on any device connected to channel 0 wouldcause bit 4 of the control register to be set on the read. The mastercan then address the PCA9544A and read the contents of thecontrol byte to determine which channel contains the devicegenerating the interrupt. The master can then reconfigure thePCA9544A to select this channel, and locate the device generatingthe interrupt and clear it. The interrupt clears when the deviceoriginating the interrupt clears.
标签： 4channel multiple 9544A 9544
上传时间： 2014-12-28
上传用户：潜水的三贡
