keil c51 v9.01此版不是汉化中文版，是英文版来的。ARM发布Keil μVision4集成开发环境(IDE)，用来在微控制器和智能卡设备上创建、仿真和调试嵌入式应用。 μVision4 IDE是为增强开发人员的工作效率设计的，有了它可以更快速、更高效地开发和检验程序。通过μVision4 IDE中引入的灵活的窗口管理系统，开发人员可以使用多台监视器，在可视界面任何地方全面控制窗口放置。 新用户界面可以更好地利用屏幕空间，更有效地组织多个窗口，为开发应用提供整齐高效的环境。 μVision4在μVision3的成功经验的基础上增加了：* System Viewer (系统查看程序)窗口，提供了设备外围寄存器信息，这些信息可以在System Viewer窗口内部直接更改。* Debug Restore Views (调试恢复视图)允许保存多个窗口布局，为程序分析迅速选择最适合的调试视图。* Multi-Project Workspace(多项目工作空间)为处理多个并存的项目提供了简化的方法，如引导加载程序和应用程序。* 为基于ARM Cortex 处理器的MCU提供了Data and INSTRUCTIon trace(数据和指令追踪)功能。* 扩展了Device Simulation(设备仿真)功能以支持许多新设备，如Luminary、NXP和东芝生产的基于ARM Cortex-M3处理器的MCU；Atmel SAM7/9；及新的8051衍生品，如Infineon XC88x和SiLABS 8051Fxx。* 支持许多debug adapter interfaces(调试适配器接口)，包括ADI miDAS Link、Atmel SAM-ICE、Infineon DAS和ST-Link。
上传时间： 2013-10-31
上传用户：qingdou
NXP Semiconductor designed the LPC2400 microcontrollers around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded Trace. The LPC2400 microcontrollers have 512 kB of on-chip high-speedFlash memory. This Flash memory includes a special 128-bit wide memory interface andaccelerator architecture that enables the CPU to execute sequential INSTRUCTIons fromFlash memory at the maximum 72 MHz system clock rate. This feature is available onlyon the LPC2000 ARM Microcontroller family of products. The LPC2400 can execute both32-bit ARM and 16-bit Thumb INSTRUCTIons. Support for the two INSTRUCTIon Sets meansEngineers can choose to optimize their application for either performance or code size atthe sub-routine level. When the core executes INSTRUCTIons in Thumb state it can reducecode size by more than 30 % with only a small loss in performance while executingINSTRUCTIons in ARM state maximizes core performance.
上传时间： 2013-11-15
上传用户：zouxinwang
Virtex-5, Spartan-DSP FPGAs Application Note This application note demonstrates how efficient implementations of Digital Up Converters(DUC) and Digital Down Converters (DDC) can be done by leveraging the Xilinx DSP IPportfolio for increased productivity and reduced time to development. Step-by-step INSTRUCTIon is given on how to perform system-level trade off analysis and develop the most efficient FPGA implementation, thus allowing engineers a flexible, low-cost and low-power alternative to ASSP technologies.
标签： Spartan-DSP Virtex FPGAs Ap
上传时间： 2013-10-23
上传用户：raron1989
虽然PIC都是8位的单片机，但都采用RISC（Reduced INSTRUCTIon Set Computing）核心结构，这有别于过去一般的CISC(Complex INSTRUCTIon Set Computing)结构。所谓RISC结构就是采用哈佛双总线结构，将地址总线与数据总线分开，因此在同一个指令执行过程中，数据与地址可以同时传送，避免了总线处理上的瓶颈。
上传时间： 2013-11-21
上传用户：tianyi223
汇编器在微处理器的验证和应用中举足轻重，如何设计通用的汇编器一直是研究的热点之一。本文提出了一种开放式的汇编器系统设计思想，在汇编语言与机器语言间插入中间代码CMDL（code mapping description language）语言，打破汇编语言与机器语言的直接映射关系，由此建立起一套描述汇编语言与机器语言的开放式映射体系。基于此开放式映射体系开发了一套汇编器系统，具有较高层次上的通用性和可移植性。【关键词】指令集，CMDL，汇编器，开放式 Design of Retargetable Assembler System Liu Ling Feng Wen Nan Wang Ying Chun Jiang An Ping Ji Li Jiu IME of Peking University, 100871【摘要】An assembler plays a very important role in the field of microprocessor verifications and applications, thus how to build a retargetable assembler system has been a hotspot in this field for long time. This paper presents a new method about the retargetable assembler system design.It provides a kind of language CMDL, code mapping description language. During the process of assembling, assembler languages are firstly translated to CMDL, and then mapped to the machine codes. In an other word, CMDL is inserted between assembler languages and machine codes during the translation procedure. As a medium code, CMDL has a lot of features, such as high extraction, strong descript capabilities. It can describe almost all attributes of assembler languages. By breaking the direct mapping relationship between assembler languages and machine codes, the complexities of machine codes are hided to the users, therefore, the new retargetable assembler system has higher retargetable level by converting the mapping from assembler languages and machine codes to assembler languages and CMDL, and implementationof it becomes easier. Based on the new mapping system structure, a retargetable assemblersystem is developed. It proved the whole system has good retargetability and implantability.【关键词】INSTRUCTIon set, symbol table, assembler, lexical analysis, retargetability
上传时间： 2013-10-10
上传用户：meiguiweishi
MCSÉ-51 Programmer's Guide and INSTRUCTIon Set The information presented in this chapter is collected from the MCSÉ-51 Architectural Overview and the HardwareDescription of the 8051, 8052 and 80C51 chapters of this book. The material has been selected and rearranged toform a quick and convenient reference for the programmers of the MCS-51. This guide pertains specifically to the8051, 8052 and 80C51.
上传时间： 2013-11-13
上传用户：hj_18
The AT89C52 is a low-power, high-performance CMOS 8-bit microcomputer with 8Kbytes of Flash programmable and erasable read only memory (PEROM). The deviceis manufactured using Atmel’s high-density nonvolatile memory technology and iscompatible with the industry-standard 80C51 and 80C52 INSTRUCTIon set and pinout.The on-chip Flash allows the program memory to be reprogrammed in-system or by aconventional nonvolatile memory programmer. By combining a versatile 8-bit CPUwith Flash on a monolithic chip, the Atmel AT89C52 is a powerful microcomputerwhich provides a highly-flexible and cost-effective solution to many embedded controlapplications.
上传时间： 2013-11-10
上传用户：1427796291
With the Altera Nios II embedded processor, you as the system designercan accelerate time-critical software algorithms by adding customINSTRUCTIons to the Nios II processor INSTRUCTIon set. Using customINSTRUCTIons, you can reduce a complex sequence of standard INSTRUCTIonsto a single INSTRUCTIon implemented in hardware. You can use this featurefor a variety of applications, for example, to optimize software innerloops for digital signal processing (DSP), packet header processing, andcomputation-intensive applications. The Nios II configuration wizard,part of the Quartus® II software’s SOPC Builder, provides a graphicaluser interface (GUI) used to add up to 256 custom INSTRUCTIons to theNios II processor
上传时间： 2013-11-07
上传用户：swing
The LPC1850/30/20/10 are ARM Cortex-M3 based microcontrollers for embeddedapplications. The ARM Cortex-M3 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC1850/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture withseparate local INSTRUCTIon and data buses as well as a third bus for peripherals. The ARMCortex-M3 CPU also includes an internal prefetch unit that supports speculativebranching.The LPC1850/30/20/10 include up to 200 kB of on-chip SRAM data memory, a quad SPIFlash Interface (SPIFI), a State Configuration Timer (SCT) subsystem, two High-speedUSB controllers, Ethernet, LCD, an external memory controller, and multiple digital andanalog peripherals.
上传时间： 2014-12-31
上传用户：zhuoying119
The LPC4350/30/20/10 are ARM Cortex-M4 based microcontrollers for embeddedapplications. The ARM Cortex-M4 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC4350/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture withseparate local INSTRUCTIon and data buses as well as a third bus for peripherals, andincludes an internal prefetch unit that supports speculative branching. The ARMCortex-M4 supports single-cycle digital signal processing and SIMD INSTRUCTIons. Ahardware floating-point processor is integrated in the core.The LPC4350/30/20/10 include an ARM Cortex-M0 coprocessor, up to 264 kB of datamemory, advanced configurable peripherals such as the State Configurable Timer (SCT)and the Serial General Purpose I/O (SGPIO) interface, two High-speed USB controllers,Ethernet, LCD, an external memory controller, and multiple digital and analog peripherals
上传时间： 2013-10-28
上传用户：15501536189
