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  • 基于单片机的除尘控制器的设计

    基于单片机的除尘控制器的设计:介绍通用控制仪的硬件组成和软件设计,阐述了系统的性能指标和功能特点。该产品功能完善,可靠性高,具有很好的应用前景。关键词: 除尘器;通用控制仪;单片机;系统设计 Abstract: The hardware structure and the software design are introduced in this paper, and the performance index and the features of the system are expounded. It has comp rehensive functions, high reliability and good app lication.Key words: dust catcher; universal controller; microcontroller; system design

    标签: 单片机 除尘 控制器

    上传时间: 2013-11-16

    上传用户:ming52900

  • 水位监测报警系统原理

    摘要:本水位监测报警器使用5V低压直流电源(也可以用3节5号电池代替)就可以对5~15厘米的水位进行监测,用LED显示和数码管显示水位,并可以对不再此范围内的水位发出报警。主要采用CD4066、74LS86、74LS32、CD4511芯片,再加上数码管、蜂鸣器、发光二极管、电阻这些器件组成一个简单而灵敏的监测报警电路,操作简单,接通电源即可工作。因为大部分电路采用数字电路,所以本水位监测报警器还具有耗能低、准确性高的特点。关键字:译码电路    报警电路    监测电路 Abstract: The water level alarm monitoring the use of 5 V low-voltage DC power (can also use three batteries replaced on the 5th) will be able to 5 to 15 centimeters of water level monitoring, with LED display and digital display of water level, and this can no longer Within the scope of a water level alarm. Mainly CD4066, 74LS86, 74LS32, CD4511 chips, coupled with digital control, buzzer, light-emitting diode, the resistance of these devices composed of a simple and sensitive monitoring alarm circuits. Because the majority of circuits using digital circuitry, so the water level monitored alarm system also has low energy consumption, high accuracy of the characteristics. Keyword: Decoding circuit alarm circuit monitoring circuit

    标签: 水位 监测报警 系统原理

    上传时间: 2013-11-05

    上传用户:王庆才

  • 基于单片机控制的二氧化碳浓度测试计

    基于单片机控制的二氧化碳浓度测试计:基于CDM4161二氧化碳气体浓度测试模块以及ATtiny26单片机,提出了一种二氧化碳浓度测试计的设计方案。该方案具有硬件电路简单、成本低、可靠性高、测量准确等优点,具有较高的实用价值。 Abstract: Abstract:A desigh scheme of CO2 concentration meter based on CDM4161carbon dioxide concentration test module and ATtiny26micro-controller is presented in this paper.The design scheme features simple hardware circuit,low-cost,high reli-ability,accurate measurement and it has a high practical value.

    标签: 单片机控制 二氧化碳 测试

    上传时间: 2013-11-14

    上传用户:zjwangyichao

  • MPC106 PCI Bridge/Memory Contr

    In this document, the term Ô60xÕ is used to denote a 32-bit microprocessor from the PowerPC architecture family that conforms to the bus interface of the PowerPC 601ª, PowerPC 603ª, or PowerPC 604 microprocessors. Note that this does not include the PowerPC 602ª microprocessor which has a multiplexed address/data bus. 60x processors implement the PowerPC architecture as it is speciÞed for 32-bit addressing, which provides 32-bit effective (logical) addresses, integer data types of 8, 16, and 32 bits,and ßoating-point data types of 32 and 64 bits (single-precision and double-precision).1.1 Overview The MPC106 provides an integrated high-bandwidth, high-performance, TTL-compatible interface between a 60x processor, a secondary (L2) cache or additional (up to four total) 60x processors, the PCI bus,and main memory. This section provides a block diagram showing the major functional units of the 106 and describes brießy how those units interact.Figure 1 shows the major functional units within the 106. Note that this is a conceptual block diagram intended to show the basic features rather than an attempt to show how these features are physically implemented on the device.

    标签: Bridge Memory Contr MPC

    上传时间: 2013-10-08

    上传用户:18711024007

  • 用外部设备设置32位微控制器TriCore的中断的指令及方法

    The Infineon TriCore provides an Interrupt System with a high safety standard. Thisdocument contains some instructions on how to initiate an Interrupt from an externaldevice. First it will show you how to trigger an Interrupt Service Request by an impulseon Port 0 or Port 1. Then in the second part of the document you can find hints how todebounce impulses to enable the use of a simple switch as input device.Authors: Thomas Bliem, CQ Nguyen / Infineon SMI MD Apps

    标签: TriCore 外部设备 中断 微控制器

    上传时间: 2013-11-05

    上传用户:uuuuuuu

  • XA-S3的IIC接口的驱动器软件程序(C语言)

    The XA-S3 is a member of Philips Semiconductors’ XA (eXtended Architecture) family of high performance 16-bit single-chip Microcontrollers. The XA-S3 combines many powerful peripherals on one chip. Therefore, it is suited for general multipurpose high performance embedded control functions.One of the on-chip peripherals is the I2C bus interface. This report describes worked-out driver software (written in C) to program / use the I2C interface of the XA-S3. The driver software, together with a demo program and interface software routines offer the user a quick start in writing a complete I2C - XAS3 system application.

    标签: XA-S IIC C语言 接口

    上传时间: 2013-11-10

    上传用户:liaofamous

  • I2C slave routines for the 87L

    The 87LPC76X Microcontroller combines in a small package thebenefits of a high-performance microcontroller with on-boardhardware supporting the Inter-Integrated Circuit (I2C) bus interface.The 87LPC76X can be programmed both as an I2C bus master, aslave, or both. An overview of the I2C bus and description of the bussupport hardware in the 87LPC76X microcontrollers appears inapplication note AN464, Using the 87LPC76X Microcontroller as anI2C Bus Master. That application note includes a programmingexample, demonstrating a bus-master code. Here we show anexample of programming the microcontroller as an I2C slave.The code listing demonstrates communications routines for the87LPC76X as a slave on the I2C bus. It compliments the program inAN464 which demonstrates the 87LPC76X as an I2C bus master.One may demonstrate two 87LPC76X devices communicating witheach other on the I2C bus, using the AN464 code in one, and theprogram presented here in the other. The examples presented hereand in AN464 allow the 87LPC76X to be either a master or a slave,but not both. Switching between master and slave roles in amultimaster environment is described in application note AN435.The software for a slave on the bus is relatively simple, as theprocessor plays a relatively passive role. It does not initiate bustransfers on its own, but responds to a master initiating thecommunications. This is true whether the slave receives or transmitsdata—transmission takes place only as a response to a busmaster’s request. The slave does not have to worry about arbitrationor about devices which do not acknowledge their address. As theslave is not supposed to take control of the bus, we do not demandit to resolve bus exceptions or “hangups”. If the bus becomesinactive the processor simply withdraws, not interfering with themaster (or masters) on the bus which should (hopefully) try toresolve the situation.

    标签: routines slave I2C 87L

    上传时间: 2013-11-19

    上传用户:shirleyYim

  • MPC7400 Part Number Speci&THOR

    MPC7400 Part Number SpeciÞcationThis document describes part number speciÞc changes to recommended operating conditions and revised electrical speciÞcations,as applicable, from those described in the generalMPC7400 Hardware SpeciÞcations.SpeciÞcations provided in this Part Number SpeciÞcation supersede those in theMPC7400 Hardware SpeciÞcationsdated 9/99(order #: MPC7400EC/D) for these part numbers only; speciÞcations not addressed herein are unchanged. This document isfrequently updated, refer to the website at http://www.mot.com/SPS/PowerPC/ for the latest version.Note that headings and table numbers in this data sheet are not consecutively numbered. They are intended to correspond to theheading or table affected in the general hardware speciÞcation.

    标签: Number Speci 7400 Part

    上传时间: 2014-12-28

    上传用户:huyahui

  • MPC7400l零件号码规范说明

    This document describes part number speciÞc changes to recommended operating conditions and revised electrical speciÞcations,as applicable, from those described in the generalMPC7400 Hardware SpeciÞcations.SpeciÞcations provided in this Part Number SpeciÞcation supersede those in theMPC7400 Hardware SpeciÞcationsdated 9/99(order #: MPC7400EC/D) for these part numbers only; speciÞcations not addressed herein are unchanged. This document isfrequently updated, refer to the website at http://www.mot.com/SPS/PowerPC/ for the latest version.Note that headings and table numbers in this data sheet are not consecutively numbered. They are intended to correspond to theheading or table affected in the general hardware speciÞcation.Part numbers addressed in this document are listed in Table A. For more detailed ordering information see Table B.

    标签: 7400l 7400 MPC 零件

    上传时间: 2013-11-19

    上传用户:qiaoyue

  • DS1820 C51 子程序 (一线数据传输)

    //芯片资料请到www.elecfans.com查找 //DS1820 C51 子程序//这里以11.0592M晶体为例,不同的晶体速度可能需要调整延时的时间//sbit DQ =P2^1;//根据实际情况定义端口 typedef unsigned char byte;typedef unsigned int  word; //延时void delay(word useconds){  for(;useconds>0;useconds--);} //复位byte ow_reset(void){  byte presence;  DQ = 0; //pull DQ line low  delay(29); // leave it low for 480us  DQ = 1; // allow line to return high  delay(3); // wait for presence  presence = DQ; // get presence signal  delay(25); // wait for end of timeslot  return(presence); // presence signal returned}     // 0=presence, 1 = no part //从 1-wire 总线上读取一个字节byte read_byte(void){  byte i;  byte value = 0;  for (i=8;i>0;i--)  {    value>>=1;    DQ = 0; // pull DQ low to start timeslot    DQ = 1; // then return high    delay(1);  //for (i=0; i<3; i++);     if(DQ)value|=0x80;    delay(6); // wait for rest of timeslot  }  return(value);} //向 1-WIRE 总线上写一个字节void write_byte(char val){  byte i;  for (i=8; i>0; i--) // writes byte, one bit at a time  {    DQ = 0; // pull DQ low to start timeslot    DQ = val&0x01;    delay(5); // hold value for remainder of timeslot    DQ = 1;    val=val/2;  }  delay(5);} //读取温度char Read_Temperature(void){  union{    byte c[2];    int x;  }temp;   ow_reset();  write_byte(0xCC); // Skip ROM  write_byte(0xBE); // Read Scratch Pad  temp.c[1]=read_byte();  temp.c[0]=read_byte();  ow_reset();  write_byte(0xCC); //Skip ROM  write_byte(0x44); // Start Conversion  return temp.x/2;}

    标签: 1820 C51 DS 程序

    上传时间: 2013-11-03

    上传用户:hongmo