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GATES

  • Analog Solutions for Altera FPGAs

    Designing withProgrammable Logicin an Analog WorldProgrammable logic devices revolutionizeddigital design over 25 years ago,promising designers a blank chip todesign literally any function and programit in the field. PLDs can be low-logicdensity devices that use nonvolatilesea-of-GATES cells called complexprogrammable logic devices (CPLDs)or they can be high-density devicesbased on SRAM look-up tables (LUTs)

    标签: Solutions Analog Altera FPGAs

    上传时间: 2013-11-08

    上传用户:虫虫虫虫虫虫

  • WP200-将Spartan-3 FPGA用作远程数码相机的低成本控制器

      The introduction of Spartan-3™ devices has createdmultiple changes in the evolution of embedded controldesigns and pushed processing capabilities to the “almostfreestage.” With these new FPGAs falling under $20, involume, with over 1 million system GATES, and under $5for 100K gate-level units, any design with programmablelogic has a readily available 8- or 16-bit processor costingless than 75 cents and 32-bit processor for less than $1.50.

    标签: Spartan FPGA 200 WP

    上传时间: 2013-12-10

    上传用户:zgu489

  • Analog Solutions for Altera FPGAs

    Designing withProgrammable Logicin an Analog WorldProgrammable logic devices revolutionizeddigital design over 25 years ago,promising designers a blank chip todesign literally any function and programit in the field. PLDs can be low-logicdensity devices that use nonvolatilesea-of-GATES cells called complexprogrammable logic devices (CPLDs)or they can be high-density devicesbased on SRAM look-up tables (LUTs)

    标签: Solutions Analog Altera FPGAs

    上传时间: 2013-10-27

    上传用户:fredguo

  • Analog Solutions for Xilinx FPGAs

    Designing withProgrammable Logicin an Analog WorldProgrammable logic devicesrevolutionized digital design over 25years ago, promising designers a blankchip to design literally any functionand program it in the field. PLDs canbe low-logic density devices that usenonvolatile sea-of-GATES cells calledcomplex programmable logic devices(CPLDs) or they can be high-densitydevices based on SRAM look-up tables

    标签: Solutions Analog Xilinx FPGAs

    上传时间: 2013-11-07

    上传用户:suicone

  • WP200-将Spartan-3 FPGA用作远程数码相机的低成本控制器

      The introduction of Spartan-3™ devices has createdmultiple changes in the evolution of embedded controldesigns and pushed processing capabilities to the “almostfreestage.” With these new FPGAs falling under $20, involume, with over 1 million system GATES, and under $5for 100K gate-level units, any design with programmablelogic has a readily available 8- or 16-bit processor costingless than 75 cents and 32-bit processor for less than $1.50.

    标签: Spartan FPGA 200 WP

    上传时间: 2013-10-21

    上传用户:ligi201200

  • WHAT MIME64 IS: MIME64 is an encoding described in RFC1341 as MIME base64.Its purpose is to encode b

    WHAT MIME64 IS: MIME64 is an encoding described in RFC1341 as MIME base64.Its purpose is to encode binary files into ASCII so that they may be passedthrough e-mail GATES. In this regard, MIME64 is similar to UUENCODE.Although most binaries these days are transmitted using UUENCODE, Ihave seen a few using MIME64, and I have had requests from friends thatI decode MIME64 files that have fallen into their hands. As long assome MIME64 continues to exist, a package such as this one is usefulto have.

    标签: MIME described 64 encoding

    上传时间: 2013-12-17

    上传用户:maizezhen

  • 十年前

    十年前,微软帝国的缔造者比尔-盖茨(Bill GATES)曾撰写过一本在当时轰动一时的书——《未来之路》,他在这本276页的书中预测了微软乃至整个科技产业未来的走势。盖茨在书中写道:“虽然现在看来这些预测不太可能实现,甚至有些荒谬,但是我保证这是本严肃的书,而决不是戏言。十年后我的观点将会得到证实。”一转眼十年过去了,现在让我们回顾一下盖茨的书中到底预测了些什么,又有哪些已经成为了现实。

    标签:

    上传时间: 2013-12-23

    上传用户:541657925

  • The objective of this projectis to design, model and simulate an autocorrelation generator circuit

    The objective of this projectis to design, model and simulate an autocorrelation generator circuit using 4-bit LFSR. the register and LFSR will used D flip-flop and some GATES. By the autocorrelation concept, there should be 2 same length vectors, for calculating the autocorrelation , we have to design the register for storing the original vector and the shifter for make time delay.

    标签: autocorrelation objective generator projectis

    上传时间: 2015-08-17

    上传用户:ikemada

  • this a pack include source code for quartus 2. It is an implementation of the LC2. The LC-2 compu

    this a pack include source code for quartus 2. It is an implementation of the LC2. The LC-2 computer is described in Introduction to Computing Systems from Bits & GATES to C & Beyond by Yale Patt and Sanjay Patel, McGraw Hill, 2001. The LC2 model can be run as a simulation or downloaded to the UP3 in a larger model, TOP_LC2 that adds video output. Push buttons reset and single step the processor and a video output display of registers is generated. This state machine VHDL-based model of the LC-2 includes all source files. Currently compiled for a Cyclone EP1C6Q240 FPGA.

    标签: implementation include quartus source

    上传时间: 2013-12-25

    上传用户:坏坏的华仔

  • This file contains a selection of VHDL source files which serve to illustrate the diversity and powe

    This file contains a selection of VHDL source files which serve to illustrate the diversity and power of the language when used to describe various types of hardware. The examp terms of basic logic GATES, to more complex systems, such as a behavioural model of a microprocessor and associated memory. All of the examples can be simulated using any synthesised using current synthesis tools.

    标签: illustrate diversity selection contains

    上传时间: 2016-06-06

    上传用户:yimoney