last time when i came here to find some clock references. but most of them can not works well. so this files works well on FPGA board.
标签: references clock works last
上传时间: 2015-11-07
上传用户:baitouyu
This application note shows how to achieve low-cost, efficient serial configuration for Spartan FPGA designs. The approachrecommended here takes advantage of unused resources in a design, thereby reducing the cost, part count, memory size,and board space associated with the serial configuration circuitry. As a result, neither processor nor PROM needs to be fullydedicated to performing Spartan configuration.In particular, information is provided on how the idle processing time of an on-board controller can be used to loadconfiguration data from an off-board source. As a result, it is possible to upgrade a Spartan design in the field by sending thebitstream over a network.
上传时间: 2014-08-16
上传用户:adada
针对传统集成电路(ASIC)功能固定、升级困难等缺点,利用FPGA实现了扩频通信芯片STEL-2000A的核心功能。使用ISE提供的DDS IP核实现NCO模块,在下变频模块调用了硬核乘法器并引入CIC滤波器进行低通滤波,给出了DQPSK解调的原理和实现方法,推导出一种简便的引入?仔/4固定相移的实现方法。采用模块化的设计方法使用VHDL语言编写出源程序,在Virtex-II Pro 开发板上成功实现了整个系统。测试结果表明该系统正确实现了STEL-2000A的核心功能。 Abstract: To overcome drawbacks of ASIC such as fixed functionality and upgrade difficulty, FPGA was used to realize the core functions of STEL-2000A. This paper used the DDS IP core provided by ISE to realize the NCO module, called hard core multiplier and implemented CIC filter in the down converter, described the principle and implementation detail of the demodulation of DQPSK, and derived a simple method to introduce a fixed phase shift of ?仔/4. The VHDL source code was designed by modularity method , and the complete system was successfully implemented on Virtex-II Pro development board. Test results indicate that this system successfully realize the core function of the STEL-2000A.
上传时间: 2013-11-06
上传用户:liu123
Raggedstone1 IP core. Raggedstone1 is a low-cost Spartan3 FPGA based PCI development board made by Enterpoint Ltd.
标签: Raggedstone1 development Spartan3 low-cost
上传时间: 2013-12-02
上传用户:lps11188
资料共6.37G,Xilinx Z-turn Board zynq7020平台,包括FPGA、SDK源码,例程源码,各种图像处理,人工智能算法,原理图,PCB,适合做项目移植、项目开发
上传时间: 2021-12-20
上传用户:
利用FPGA的51 ,IP核实现与单片机和ARM的串口通信
上传时间: 2013-08-05
上传用户:lalaruby
基于FPGA数字频率计的实现,文中有所有的源代码,仅供参考。
上传时间: 2013-08-05
上传用户:13736136189
学习FPGA的不错的文章,有利于自己设计和编写程序
标签: FPGA
上传时间: 2013-08-05
上传用户:xjz632
基FPGA Cyclone II_EP2C5 EP2C8的频率计
上传时间: 2013-08-05
上传用户:Thuan
波束成型,基于FPGA的波束成型,包括两个文件,一个滤波器,一个xilinx仿真
上传时间: 2013-08-05
上传用户:joheace