The STWD100 watchdog timer circuits are self-contained devices which prevent systemfailures that are caused by certain types of hardware errors (non-responding peripherals,bus contention, etc.) or software errors (bad code jump, code stuck in loop, etc.).The STWD100 watchdog timer has an input, WDI, and an output, WDO (see Figure 2). Theinput is used to clear the internal watchdog timer periodically within the specified timeoutperiod, twd (see Section 3: Watchdog timing). While the system is operating correctly, itperiodically toggles the watchdog input, WDI. If the system fails, the watchdog timer is notreset, a system alert is generated and the watchdog output, WDO, is asserted (seeSection 3: Watchdog timing).The STWD100 circuit also has an enable pin, EN (see Figure 2), which can enable orDisable the watchdog functionality. The EN pin is connected to the internal pull-downresistor. The device is enabled if the EN pin is left floating.
上传时间： 2013-10-22
上传用户：taiyang250072
一个24c16的读写程序（已经调试过）(arens) //////////////////////////////////////////////////////////////// //24c16读写驱动程序，FM24C16A-AT24C16中文资料pdf //=-------------------------------------------------------------------------------/*模块调用:读数据:read(unsigned int address)写数据:write(unsigned int address,unsigned char dd) dd为要写的 数据字节*///---------------------------------------------------------------------------------- sbit sda=P3^0;sbit scl=P3^1; sbit a0=ACC^0; //定义ACC的位，利用ACC操作速度最快sbit a1=ACC^1;sbit a2=ACC^2;sbit a3=ACC^3;sbit a4=ACC^4;sbit a5=ACC^5;sbit a6=ACC^6;sbit a7=ACC^7; //--------------------------------------------------------------------------------------#pragma Disablevoid s24(void) //起始函数{_nop_(); scl=0; sda=1; scl=1; _nop_(); sda=0; _nop_(); _nop_(); scl=0; _nop_(); _nop_(); sda=1;
上传时间： 2013-10-31
上传用户：fdfadfs
c8051f020 实时时钟模块程序 内含IIC模块程序/********************** SYSTEM CLOCK 8M********************************/ extern unsigned char xdata currenttime[16]={0} extern unsigned char xdata settime[16]={ 0x00, // control regesiter 1 0x00, // control regesiter 2 0x01, //current second 0x19, //current minute 0x20, //current hour 0x29, //current data 0x04, //current week 0x07, //current month 0x05, //current year 0x00, // alarm value reset 0x00, // alarm value reset 0x00, // alarm value reset 0x00, // alarm value reset 0x00, // clk out Disable 0x00, // close timer 0x00, } /*********************************************************************/ extern void Current_Time ( void ) extern void Set_Time ( void )
标签： c8051f020 SYSTEM CLOCK IIC
上传时间： 2015-06-30
上传用户：edisonfather
IrCOMM2k - Virtual Infrared COM Port for Windows 2000/XP。 2. FILES IN THIS ARCHIVE: - Setup.exe (setup and uninstall program) - ircomm2k.exe (service program) - ircomm2k.sys (device driver) - ircomm2k.dll (device property page) - ircomm2k.hlp (property page context help) - ircomm2k.inf (setup script for windows) - Readme.txt (this file) - License.txt (terms of license) 3. INSTALLATION 1. unzip IrCOMM2k-1.2.0.zip in a new folder 2. run the setup program 3. Disable the image transfer under wireless link
标签： IrCOMM2k Infrared ARCHIVE Virtual
上传时间： 2015-09-15
上传用户：yyq123456789
基于Verilog-HDL的硬件电路的实现 9.5 脉冲周期的测量与显示 9.5.1 脉冲周期的测量原理 9.5.2 周期计的工作原理 9.5.3 周期测量模块的设计与实现 9.5.4 forever循环语句的使用方法 9.5.5 Disable禁止语句的使用方法 9.5.6 时标信号发生模块的设计与实现 9.5.7 周期计的Verilog-HDL描述 9.5.8 周期计的硬件实现 9.5.9 周期测量模块的设计与实现之二 9.5.10 改进型周期计的Verilog-HDL描述 9.5.11 改进型周期计的硬件实现 9.5.12 两种周期计的对比
标签： Verilog-HDL 周期 9.5 脉冲
上传时间： 2015-09-16
上传用户：皇族传媒
SAM9261 BasicMMU Example code with ADS1.2 (163 kB) The goal of this project is to show how to use a PC100 SDRAM and the MMU to perform a rating with a 100MHz Bus Clock. The rating is based on Dhrystone 2.1. It shows the rate when I+D Caches are Disabled or enabled, with or without MMU and I Cache is Disable or enabled, with or without MMU.
标签： BasicMMU Example project 9261
上传时间： 2013-12-28
上传用户：zhanditian
IO 驱动 LCD , *** *** *** *** *** *** *** *** FILE NAME: IO_LCD MCU: HT46R22 MASK OPTION: WAKE-UP: PA6,PA7 PULL-HIGH: PA,PB,PC IIC: Disable PFD: Disable PWM: Disable WDT: ENABLE CLRWDT: ONE WDT CLOCK SOURCE: T1 WDT TIME OUT SELECT: WDT CLOCK SOURCE/32768 LVR: Disable OSC: CRYSTAL SYSVOLT: 3.0V SYSFRAG: 4000KHZ AUTHOR: RADOME HISTORY: 2005.08.
上传时间： 2014-12-21
上传用户：watch100
该模块基于USB FX2开发板，实现了GPIO(general-purpose IO)控制功能，目前可提供15口输出控制在0V/3.3V之间切换，和9口输入在Enable/Disable之间切换。
上传时间： 2014-12-06
上传用户：myworkpost
NRF905驱动代码 // The content of this struct is nRF905 s initialize data. // CH_NO=1 433MHZ Normal Opration,No Retrans RX,TX Address is 4 Bytes // RX TX Payload Width is 32 Bytes Disable Extern Clock Fosc=16MHZ // 8 Bits CRC And enable
标签： initialize 905 content Normal
上传时间： 2013-12-16
上传用户：lanjisu111
模仿spy++ 截获取任意窗口句柄，然后对其执行相关操作（目前实现了enable和Disable)
上传时间： 2016-09-16
上传用户：cuiyashuo
