ANSI-Dhrystone
标签： ANSI-Dhrystone
上传时间： 2013-12-25
上传用户：sy_jiadeyi
The DHRY program performs the Dhrystone benchmarks on the 8051. Dhrystone is a general-performance benchmark test originally developed by Reinhold Weicker in 1984. This benchmark is used to measure and compare the performance of different computers or, in this case, the efficiency of the code generated for the same computer by different compilers. The test reports general performance in Dhrystones per second. Like most benchmark programs, Dhrystone consists of standard code and concentrates on string handling. It uses no floating-point operations. It is heavily influenced by hardware and software design, compiler and linker options, code optimizing, cache memory, wait states, and integer data types. The DHRY program is available in different targets: Simulator: Large Model: DHRY example in LARGE model for Simulation Philips 80C51MX: DHRY example in LARGE model for the Philips 80C51MC
标签： general-performanc benchmarks Dhrystone Dhrystone
上传时间： 2016-11-30
上传用户：hphh
Cortex-M3 是ARM 公司为要求高性能(1.25 Dhrystone MIPS/MHz)、低成本、低功耗的嵌入式应用专门设计的内核。STM32 系列产品得益于Cortex-M3 在架构上进行的多项改进，包括提升性能的同时又提高了代码密度的Thumb-2 指令集和大幅度提高中断响应的紧耦合嵌套向量中断控制器，所有新功能都同时具有业界最优的功耗水平。本系统是基于Cortex-M3 内核的STM32 微控制器的mp3 播放器，在硬件方面主要有VS1053硬件音频解码器和12864 点阵液晶屏，在软件方面主要有VS1053 的驱动，SD 卡工作在SPI 模式下的读写驱动，FAT 文件系统的移植，12864 液晶的驱动，嵌入式操作系统ucOSii 的移植以及嵌入式图形管理器ucGUI 的移植。整个设计过程包括电子系统的设计技术及调试技术，包括需求分析，原理图的绘制，pcb 板的绘制，制版，器件采购，安装，焊接，硬件调试，软件模块编写，软件模块测试，系统整体测试等整个开发调试过程。
上传时间： 2013-11-19
上传用户：shaoyun666
ARM核心是主控SOC中的重要部分，系统的日常应用都由ARM核心来完成，因此ARM核心的效能很大程度上跟用户体验有关。ARM公司一般用DMIPS/MHz来标称ARM核心的性能。DMIPS是Dhrystone Million Instructions executed Per Second的缩写，反映核心的整数计算能力。但Dhrystone算法代码本身比较叫，可以完全放到Cache中执行，因此反映的只是核心能力，并不能反映缓存、内存I/O性能。
上传时间： 2013-10-16
上传用户：devin_zhong
SAM9261 BasicMMU Example code with ADS1.2 (163 kB) The goal of this project is to show how to use a PC100 SDRAM and the MMU to perform a rating with a 100MHz Bus Clock. The rating is based on Dhrystone 2.1. It shows the rate when I+D Caches are disabled or enabled, with or without MMU and I Cache is disable or enabled, with or without MMU.
标签： BasicMMU Example project 9261
上传时间： 2013-12-28
上传用户：zhanditian
为裸机，不带操作系统的cpu，移植的Dhrystone测试程序
标签：
上传时间： 2014-12-19
上传用户：baiom
Introduction ? ? The ARM Cortex -A8 microprocessor is the first applications microprocessor in ARM!ˉs new Cortex family. With high performance and power efficiency, it targets a wide variety of mobile and consumer applications including mobile phones, set-top boxes, gaming consoles and automotive navigation/entertainment systems. The Cortex-A8 processor spans a range of performance points depending on the implementation, delivering over to 2000 Dhrystone MIPS (DMIPS) of performance for demanding consumer applications and consuming less than 300mW for low-power mobile devices. This translates into a large increase in processing capability while staying with the power levels of previous generations of mobile devices. Consumer applications will benefit from the reduced heat dissipation and resulting lower packaging and integration costs.
标签： microprocessor Introduction applications Cortex
上传时间： 2013-12-09
上传用户：xzt
STM32F407VET6数据手册Core: ARM 32-bit Cortex™-M4 CPU with FPU,Adaptive real-time accelerator (ARTAccelerator™) allowing 0-wait state executionfrom Flash memory, frequency up to 168 MHz,memory protection unit, 210 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSPinstructions
标签： stm32f407vet6 数据手册
上传时间： 2022-07-25
上传用户：
