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DEvelopment

  • S参数的设计与应用

    Agilent AN 154 S-Parameter Design Application Note S参数的设计与应用 The need for new high-frequency, solid-state circuitdesign techniques has been recognized both by microwaveengineers and circuit designers. These engineersare being asked to design solid state circuitsthat will operate at higher and higher frequencies.The DEvelopment of microwave transistors andAgilent Technologies’ network analysis instrumentationsystems that permit complete network characterizationin the microwave frequency rangehave greatly assisted these engineers in their work.The Agilent Microwave Division’s lab staff hasdeveloped a high frequency circuit design seminarto assist their counterparts in R&D labs throughoutthe world. This seminar has been presentedin a number of locations in the United States andEurope.From the experience gained in presenting this originalseminar, we have developed a four-part videotape, S-Parameter Design Seminar. While the technologyof high frequency circuit design is everchanging, the concepts upon which this technologyhas been built are relatively invariant.The content of the S-Parameter Design Seminar isas follows:

    标签: S参数

    上传时间: 2013-12-19

    上传用户:aa54

  • 基于ARM的远程无线视频监控终端设计

    提出了一种以ARM微处理器为控制核心的远程无线视频监控终端的设计方案,其监控终端的硬件设计包括视频采集处理、中央管理控制、无线传输3个模块。并给出了监控终端的软件开发平台和开发模式的系统启动代码、嵌入式Linux系统移植以及驱动程序和应用程序。测试结果表明,该监控终端设计方案合理、有效,基本满足监控需求。 Abstract:  A remote wireless video monitoring terminal design, which uses ARM microprocessor as its core control, is proposed in this paper.The hardware design of monitoring terminal system is composed of the video acquisition and processing module, the central management and control module, wireless transmission module.Meanwhile the monitoring terminal-s software DEvelopment platform and DEvelopment patterns are designed. Also the design of the system-s start codes, embedded Linux system-s transplantation process, driver and the corresponding applications are given. The results showed that the monitoring terminal design is reasonable, effective, basically meet monitoring requirements.

    标签: ARM 远程无线 视频监控 终端设计

    上传时间: 2013-11-13

    上传用户:wanqunsheng

  • C语言程序设计入门(中文版)及软件下载

    解压包包含了C语言入门经典教程和Visuak c++软件 【基本简介】 Visual C++是一个功能强大的可视化软件开发工具。自1993年Microsoft公司推出Visual C++1.0后,随着其新版本的不断问世,Visual C++已成为专业程序员进行软件开发的首选工具。 虽然微软公司推出了Visual C++.NET(Visual C++7.0),但它的应用的很大的局限性,只适用于Windows 2000,Windows XP和Windows NT4.0。所以实际中,更多的是以Visual C++6.0为平台。 Visual C++6.0不仅是一个C++编译器,而且是一个基于Windows操作系统的可视化集成开发环境(integrated DEvelopment environment,IDE)。Visual C++6.0由许多组件组成,包括编辑器、调试器以及程序向导AppWizard、类向导Class Wizard等开发工具。 这些组件通过一个名为Developer Studio的组件集成为和谐的开发环境。 在Visual C++ 6.0 企业版的基础上集成官方的SP6升级补丁制作而成!免序列号,安装完即可使用,无需再打补丁! 【使用方法】 有些朋友反应在安装后出现 "Error spawning error" 可以看看下面绿色软件找到的一些解决方案:  点击VC“TOOLS(工具)”—>“Option(选择)”—>“Directories(目录)”重新设置“Excutable Fils、Include Files、Library Files、Source Files”的路径。很多情况可能就一个盘符的不同(例如你的VC装在C,但是这些路径全部在D),改过来就OK了。

    标签: C语言 程序设计 软件

    上传时间: 2013-10-09

    上传用户:hui626493

  • ultiboard PCB DEvelopment

    Ultiboard PCB introduction

    标签: DEvelopment ultiboard PCB

    上传时间: 2013-10-09

    上传用户:yl1140vista

  • 采用TÜV认证的FPGA开发功能安全系统

    This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce DEvelopment effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 图Figure 1. Local Safety System

    标签: FPGA 安全系统

    上传时间: 2013-11-14

    上传用户:zoudejile

  • Nios II软件构建工具入门

    Nios II软件构建工具入门 The Nios® II Software Build Tools (SBT) allows you to construct a wide variety of complex embedded software systems using a command-line interface. From this interface, you can execute Software Built Tools command utilities, and use scripts other tools) to combine the command utilities in many useful ways. This chapter introduces you to project creation with the SBT at the command line This chapter includes the following sections: ■ “Advantages of Command-Line Software DEvelopment” ■ “Outline of the Nios II SBT Command-Line Interface” ■ “Getting Started in the SBT Command Line” ■ “Software Build Tools Scripting Basics” on page 3–8

    标签: Nios 软件

    上传时间: 2013-11-15

    上传用户:nanxia

  • 面向Eclips的Nios II软件构建工具手册

    面向Eclips的Nios II软件构建工具手册 The Nios® II Software Build Tools (SBT) for Eclipse™ is a set of plugins based on the Eclipse™ framework and the Eclipse C/C++ DEvelopment toolkit (CDT) plugins. The Nios II SBT for Eclipse provides a consistent DEvelopment platform that works for all Nios II embedded processor systems. You can accomplish all Nios II software DEvelopment tasks within Eclipse, including creating, editing, building, running, debugging, and profiling programs.

    标签: Eclips Nios 软件

    上传时间: 2013-11-02

    上传用户:瓦力瓦力hong

  • Employing a Single-Chip Transceiver in Femtocell Base-Station Applications

    Abstract: This application note discusses the DEvelopment and deployment of 3G cellular femtocell base stations. The technicalchallenges for last-mile residential connectivity and adding system capacity in dense urban environments are discussed, with 3Gfemtocell base stations as a cost-effective solution. Maxim's 3GPP TS25.104-compliant transceiver solution is presented along withcomplete radio reference designs such as RD2550. For more information on the RD2550, see reference design 5364, "FemtocellRadio Reference Designs Using the MAX2550–MAX2553 Transceivers."

    标签: Base-Station Applications Single-Chip Transceiver

    上传时间: 2013-11-05

    上传用户:超凡大师

  • xilinx Zynq-7000 EPP产品简介

    The Xilinx Zynq-7000 Extensible Processing Platform (EPP) redefines the possibilities for embedded systems, giving system and software architects and developers a flexible platform to launch their new solutions and traditional ASIC and ASSP users an alternative that aligns with today’s programmable imperative. The new class of product elegantly combines an industrystandard ARMprocessor-based system with Xilinx 28nm programmable logic—in a single device. The processor boots first, prior to configuration of the programmable logic. This, along with a streamlined workflow, saves time and effort and lets software developers and hardware designers start DEvelopment simultaneously. 

    标签: xilinx Zynq 7000 EPP

    上传时间: 2013-10-09

    上传用户:evil

  • US Navy VHDL Modelling Guide

      This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the DEvelopment of VHDL modelswhich are compliant with the VHDL Data Item Description (DID DI-EGDS-80811) and which can be providedto manufacturing engineering personnel for the DEvelopment of production data and the subsequent productionof hardware. Most VHDL modeling performed to date has been concentrated at either the component level orat the conceptual system level. The assembly and sub-assembly levels have been largely disregarded. Under theSHARP TIREP project, an attempt has been made to help close this gap. The TIREP models are based upon lowcomplexity Standard Electronic Modules (SEM) of the format A configuration. Although these modules are quitesimple, it is felt that the lessons learned offer guidance which can readily be applied to a wide range of assemblytypes and complexities.

    标签: Modelling Guide Navy VHDL

    上传时间: 2013-11-20

    上传用户:pzw421125