This reference design describes the design of a 3-phase AC induction vector control drive with position encoder coupled to the motor shaft. It is based on Motorola’s DSP56F805 dedicated motor control device. AC induction motors, which contain a cage, are very popular in variable speed drives. They are simple, rugged, inexpensive and available at all power ratings. Progress in the field of power electronics and microelectronics enables the application of induction motors for high-performance drives, where traditionally only DC motors were applied. Thanks to sophisticated control methods, AC induction drives offer the same control capabilities as high performance four-quadrant DC drives.
标签： Reference Designer Manual Phase DRM 023 AC
上传时间： 2020-06-10
上传用户：shancjb
The main aim of this book is to present a unified, systematic description of basic and advanced problems, methods and algorithms of the modern con- trol theory considered as a foundation for the design of computer control and management systems. The scope of the book differs considerably from the topics of classical traditional control theory mainly oriented to the needs of automatic control of technical devices and technological proc- esses. Taking into account a variety of new applications, the book presents a compact and uniform description containing traditional analysis and op- timization problems for control systems as well as control problems with non-probabilistic models of uncertainty, problems of learning, intelligent, knowledge-based and operation systems – important for applications in the control of manufacturing processes, in the project management and in the control of computer systems.
上传时间： 2020-06-10
上传用户：shancjb
ABSTRACTThe flyback power stage is a popular choice for single and multiple output dc-to-dc converters at powerlevels of 150 Watts or less. Without the output inductor required in buck derived topologies, such as theforward or push-pull converter, the component count and cost are reduced. This application note will reviewthe design procedure for the power stage and control electronics of a flyback converter. In these isolatedconverters, the error signal from the secondary still needs to cross the isolation boundary to achieveregulation. By using the UC3965 Precision Reference with Low Offset Error Amplifier on the secondaryside to drive an optocoupler and the UCC3809 Economy Primary Side Controller on the primary side, asimple and low cost 50 Watt isolated power supply is realized.
标签： 隔离
上传时间： 2021-11-24
上传用户：kingwide
CHAPTER 1: THE OP AMP CHAPTER 2: OTHER LINEAR CIRCUITS CHAPTER 3: SENSORS CHAPTER 4: RF/IF CIRCUITS CHAPTER 5: FUNDAMENTALS OF SAMPLED DATA SYSTEMS CHAPTER 6: CONVERTERS CHAPTER 7: DATA CONVERTER SUPPORT CIRCUITS CHAPTER 8: ANALOG FILTERS CHAPTER 9: POWER MANAGEMENT CHAPTER 10: PASSIVE COMPONENTS CHAPTER 11: OVERVOLTAGE EFFECTS ON ANALOG INTEGRATED CIRCUITS CHAPTER 12: PRINTED CIRCUIT BOARD (PCB) DESIGN ISSUES CHAPTER 13: DESIGN DEVELOPMENT TOOLS
上传时间： 2021-12-21
上传用户：wangshoupeng199
The PW8205A8TS is the highest performance trench N-ch MOSFETs with extreme high cell density,which provide excellent RDSON and gate charge for most of the small power switching and loadswitch applications. The meet the RoHS and Product requirement with full function reliabilityapproved .
标签： 8205a8
上传时间： 2022-02-14
上传用户：wangshoupeng199
本文主要介绍如何在Wado设计套件中进行时序约束，原文出自 xilinx中文社区。1 Timing Constraints in Vivado-UCF to xdcVivado软件相比于sE的一大转变就是约束文件，5E软件支持的是UcF（User Constraints file，而 Vivado软件转换到了XDc（Xilinx Design Constraints）。XDC主要基于SDc（Synopsys Design Constraints）标准，另外集成了Xinx的一些约束标准可以说这一转变是xinx向业界标准的靠拢。Altera从 TimeQuest开始就一直使用SDc标准，这一改变，相信对于很多工程师来说是好事，两个平台之间的转换会更加容易些。首先看一下业界标准SDc的原文介绍：Synopsys widely-used design constraints format, known as sDc, describes the design intent"and surrounding constraints for synthesis, clocking, timing, power, test and environmental and operating conditions. sDc has been in use and evolving for more than 20 years, making it the most popular and proven format for describing design constraints. Essentially all synthesized designs use SDc and numerous EDa companies have translators that can read and process sDc
标签： vivado
上传时间： 2022-03-26
上传用户：
以AT89S52单片机为控制核心,采用电容降压技术,Buck电路拓扑,PWM驱动模块和功率器件散热设计,通过高速的数据采集、主功率输入输出模块和控制模块,设计一种新型智能车载充电器.在充电过程中,通过负脉冲瞬间放电实现对铅酸蓄电池的再生修复,提高电池的有效容量,延长使用寿命.该充电器体积小、速度快、效率高、可靠性好.With AT89S52 single chip computer as the control core,a new type of intelligent car-carried charger was designed by using capacitance step-down technology,Buck circuit topology,PWM driving module and power device heat dissipation design,through high-speed data acquisition,main power input and output module and control module.In the charging process,the regeneration and repair of lead-acid batteries are realized by instantaneous discharge of negative pulse,which improves the effective capacity of batteries and prolongs their service life.The charger has the advantages of small size,fast speed,high efficiency and good reliability.
标签： 车载充电器
上传时间： 2022-03-27
上传用户：
DescriptionThe IMX385LQR-C is a diagonal 8.35 mm (Type 1/2) CMOS active pixel type solid-state image sensor with a squarepixel array and 2.13 M effective pixels. This chip operates with analog 3.3 V, digital 1.2 V, and interface 1.8 V triplepower supply, and has low power consumption. High sensitivity, low dark current and no smear are achieved throughthe adoption of R, G and B primary color mosaic filters. This chip features an electronic shutter with variablecharge-integration time.(Applications: Surveillance cameras)
标签： CMOS传感器 IMX385LQR-C
上传时间： 2022-06-18
上传用户：
The GD32F103xx device is a 32-bit general-purpose microcontroller based on the ARM?Cortex?-M3 RISC core with best ratio in terms of processing power, reduced power consumption and peripheral set. The Cortex?-M3 is a next generation processor core whichis tightly coupled with a Nested Vectored Interrupt Controller (NVIC), SysTick timer and advanced debug support.The GD32F103xx device incorporates the ARM ' Cortex?-M3 32-bit processor core operating at 108 MHz frequency with Flash accesses zero wait states to obtain maximumefficiency. It provides up to 3 MB on-chip Flash memory and up to 96 KB SRAM memory. An extensive range of enhanced I/Os and peripherals connected to two APB buses. The devices offer up to three 12-bit ADCs, up to two 12-bit DACs, up to ten general-purpose
标签： gd32f103
上传时间： 2022-07-23
上传用户：aben
The PCA9534 is a 16-pin CMOS device that provide 8 bits of General Purpose parallel Input/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed to enhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvements include higher drive capability, 5 V I/O tolerance, lower supply current, individual I/O configuration, 400 kHz clock frequency, and smaller packaging. I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.
上传时间： 2013-10-10
上传用户：inwins
