Programming - Verilog VHDL Golden Reference Guide DOULOS Church Hatch, 22 Market Place, Ringwood. Hampshire. BH24 1AW England. Tel (+44) (0)1425 471223 Fax (+44) (0)1425 471573 Email info@doulos.co.uk URL http://www.doulos.co.uk
标签： Programming Reference Ringwood Verilog
上传时间： 2017-05-12
上传用户：ainimao
dear ahmedmgera you are welcome, to start activity you need to Introduce Yourself and Get 10 Coins & I Mana
标签： ahmedmgera Introduce you activity
上传时间： 2014-11-26
上传用户：zaizaibang
Beamforming thesis describing Study of a various Beamforming Techniques And Implementation of the Constrained Least Mean Squares (LMS) algorithm for Beamforming
标签： Beamforming Implementation describing Techniques
上传时间： 2013-12-25
上传用户：wuyuying
This library implements the KLT Tracking algorithm [2004] for Feature Tracking in Video useful in computer vision tasks like object recognition, image indexing, tracking and structure from motion. This implementation uses programmable Graphics Hardware to achieve considerable speedup in the running time of the GPU-based implementation.
标签： Tracking implements algorithm Feature
上传时间： 2013-12-10
上传用户：trepb001
This library implements the KLT Tracking algorithm [2004] for Feature Tracking in Video useful in computer vision tasks like object recognition, image indexing, tracking and structure from motion. This implementation uses programmable Graphics Hardware to achieve considerable speedup in the running time of the GPU-based implementation.
标签： Tracking implements algorithm Feature
上传时间： 2013-12-19
上传用户：WMC_geophy
The VHDL book http://www.onlinefreeebooks.net/engineering-ebooks/electrical-engineering/the-vhdl-cookbook-pdf.html
标签： electrical-engineering engineering-ebooks onlinefreeebooks the-vhdl-co
上传时间： 2014-01-07
上传用户：love1314
PARALLEL PORT JTAG PROGRAMMER Adaptor used to program the S3C2410 samsung processor. The rar file contains PDF and DSN format circuit diagram. This can be used and to make your own parallel port wiggler programmer
标签： PROGRAMMER processor PARALLEL Adaptor
上传时间： 2013-12-05
上传用户：zhangzhenyu
The emphasis of this book is on real-time application of Synopsys tools, used to combat various problems seen at VDSM geometries. Readers will be exposed to an effective design methodology for handling complex, submicron ASIC designs. Significance is placed on HDL coding styles, synthesis and optimization, dynamic simulation, formal verification, DFT scan insertion, links to layout, physical synthesis, and static timing analysis. At each step, problems related to each phase of the design flow are identified, with solutions and work-around described in detail. In addition, crucial issues related to layout, which includes clock tree synthesis and back-end integration (links to layout) are also discussed at length. Furthermore, the book contains in-depth discussions on the basics of Synopsys technology libraries and HDL coding styles, targeted towards optimal synthesis solution.
标签： application real-time Synopsys emphasis
上传时间： 2017-07-05
上传用户：waitingfy
WordWeb thesaurus/dictionary component for Delphi and C++ Builder Version 1.62, freeware The component uses the free WordWeb thesaurus/dictionay available from http://wordweb.co.uk/free You (and anyone using your program) should install WordWeb before using this component. If it is not installed the component raises an exception when you look up a word. It will also work with WordWeb Pro, available from http://www.wordweb.co.uk/ For more flexible and customizable dictionary/thesaurus components see WordWeb Developer at http://www.x-word.com/wwdev/
标签： dictionary thesaurus component freeware
上传时间： 2014-01-11
上传用户：talenthn
移位运算器SHIFTER 使用Verilog HDL 语言编写，其输入输出端分别与键盘/显示器LED 连接。移位运算器是时序电路，在J钟信号到来时状态产生变化， CLK 为其时钟脉冲。由S0、S1 、M 控制移位运算的功能状态，具有数据装入、数据保持、循环右移、带进位循环右移，循环左移、带进位循环左移等功能。 CLK 是时钟脉冲输入，通过键5 产生高低电平M 控制工作模式， M=l 时带进位循环移位，由键8 控制CO 为允许带进位移位输入，由键7 控制:S 控制移位模式0-3 ，由键6 控制，显示在数码管LED8 上 D[7..0]是移位数据输入，由键2 和1 控制，显示在数码管2 和1 上 QB[7..0]是移位数据输出，显示在数码管6 和5 上:cn 是移位数据输出进位，显示在数码管7 上。
上传时间： 2014-01-16
上传用户：wys0120
