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  • ADC模数转换器件Altium Designer AD原理图库元件库

    ADC模数转换器件Altium Designer AD原理图库元件库SV text has been written to file : 4.4 - ADC模数转换器件.csvLibrary Component Count : 29Name                Description----------------------------------------------------------------------------------------------------ADC0800             National 8-Bit Analog to Digital ConverterADC0809             ADC0831             ADCADC0832             ADC8                Generic 8-Bit A/D ConverterCLC532              High-Speed 2:1 Analog MultiplexerCS5511              National 16-Bit Analog to Digital ConverterDAC8                Generic 8-Bit D/A ConverterEL1501              Differential line Driver/ReceiverEL2082              Current-Mode MultiplierEL4083              Current Mode Four Quadrant MultiplierEL4089              DC Restored Video AmplifierEL4094              Video Gain Control/FaderEL4095              Video Gain Contol/Fader/MultiplexerICL7106             LMC6953_NSC         PCI Local Bus Power SupervisorMAX4147             300MHz, Low-Power, High-Output-Current, Differential Line DriverMAX4158             350MHz 2-CHANNEL Video Multiplexer-AmplifierMAX4159             350MHz 2-CHANNEL Video Multiplexer-AmplifierMAX4258             250MHz, 2-CHANNEL Video Multiplexer-AmplifierMAX4259             250MHz 2-CHANNEL Video Multiplexer-AmplifierMAX951              Ultra-Low-Power, Single-Supply Op Amp + Comparator + ReferenceMAX952              Ultra-Low-Power, Single-Supply Op Amp + Comparator + ReferenceMC1496              Balanced Modulator/DemodulatorPLL100k             Generic Phase Locked LoopPLL10k              Generic Phase Locked LoopPLL5k               Generic Phase Locked LoopPLLx                Generic Phase Locked Loop水位计              

    标签: adc 模数转换 altium designer

    上传时间: 2022-03-13

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  • 电流检测电路中运算放大器与ADC的设计

    电学中的测量技术涉及范围非常广,电流测量在电学计量中占有非常重要的位置。如何精确地进行电流测量是精密测量的一大难题。传统的电流检测电路多采用运算放大芯片与片外电流检测电路相结合的方式,电路集成度很低,需要较多的接口和资源才能完成对电路的检测。本文把所有电路部分都集成在一块芯片上,包括检测电阻,运算放大器电路及模拟转数字转换电路,从而在电路内部可以进行电流检测,使电路更好的集成化。前置电路使用二级共源共栅结构的运算放大器,减小沟道长度调制效应造成的电流误差。10位SAR ADC中采用电容驱动能力强的传输门保证了模数转化器的有效精度。比较器模块采用再生锁存器与迟滞比较器作为基础单元组合解决精密测量的问题。本设计可以作为嵌入芯片内的一小部分而检测芯片中的微小电流1mA~100mA,工作电压在1.8v左右,电流检测精度预期达到10uA的需求。The measurement technology in electricity involves a wide range,and current measurement plays a very important position in electrical measurement.How to accurately measure current is a big problem in precision measurement. The traditional current detecting circuit adopts the combination of the operational amplifier chip and theoff-chip current detecting circuit, The circuit integration is very low, and more interfaces and resources are needed tocomplete the circuit detection.This topic integrates all the circuit parts into one chip, including detection resistance, operational amplifier circuit andanalog to digital conversion circuit. Highly integrated circuit makes the external resources on the chip more intensive,so that current detection can be carried out inside the circuit, so that the circuit can be better integrated. Thefront-end circuit of this project uses two-stage cascade operational amplifier and cascade tube to reduce the currenterror caused by CHANNEL length modulation effect. In 10-bit SAR ADC, the transmission gate with strong capacitivedriving ability ensures the effective accuracy of the analog-to-digital converter. Comparator module uses regenerativelatch and hysteresis comparator as basic unit to solve the difficult problem of precision measurement. This topic can beused as a small part of the embedded chip to detect the micro-current in the chip 1 mA~100 mA, the working voltageis about 1.8v, and the current detection accuracy is expected to reach the requirement of 10 uA.

    标签: 电流检测 电路 运算放大器 adc

    上传时间: 2022-04-03

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  • 极化码的编解码研究及仿真

    信道编码技术能够显著改善通信系统的性能,带来编码增益,提高通信系统的容量。一直以来,人们都在寻找一种信道容量可以达到香农极限的编码。2007年,E.Arikan提出了一种名为极化码(Polar Code)的编码技术,在二进制离散无记忆信道条件下,理论上被证明可以达到香农极限,并且编解码具有较低的算法复杂度,成为信道编码史上一个重大突破。极化码作为一种新兴的编码技术,引起了无线通信界广泛的关注,成为编码领域最受瞩目的研究热点之一。本文系统的阐述了极化码,分析了极化码的编解码原理,然后将其与Turbo码、LDPC码进行了仿真比较。首先介绍了信道极化现象(CHANNEL Polarization),然后详细讨论了信道合并(CHANNEL Combining)和信道拆分(CHANNEL Spitting)的过程,以及信道极化的重要特性。接着重点介绍了极化码的编解码构造方法,系统地推导了极化码生成矩阵的形成过程,总结了极化码信息位选取的方法,并深入研究了极化码的错误概率的上下界限。最后,对极化码的编解码进行了仿真实现,探讨了不同的编码块长度、不同的编码速率及不同的迭代次数对极化码性能的影响。并将极化码与Turbo码、LDPC码进行仿真比较,分析了这三种编码的性能以及优缺点。关键词:信道编码、极化码、信道极化现象、sC解码、Turbo码、LDPC码本章中,首先简单地描述了数字通信系统,概述了信息传输过程中具体的信道模型,然后详细回顾了信道编码理论与技术的研究现况和发展历史,以及简要地概述了极化码的发展历程、编解码特点、硬件方面及其应用研究,最后简要概括了本文的主要工作,并给出了全文的详细内容安排。

    标签: 极化码

    上传时间: 2022-06-15

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  • 音响功放测试方法

    說明:1,测试交流电源(Test AC Power Supply):A.中国(China):AC 220V+/-2%50Hz+/-2%B.美国(United States of America):AC 120V+/-2%60Hz+/-2%。C.英国(Britain):AC 240V+/-2%50Hz+/-2%D.欧洲(Europe):AC 230V+/-2%50Hz+/-2%E.日本(Japan):AC 100V+/-2%60Hz+/-2%F.墨西哥(Mexico):AC 127V+/-2%60Hz+/-2%2,测试温度条件(Test Temperature Conditions):25℃+/-2℃。3,测试以右声道为准(Standard Test Use Right CHANNELl)4,信号由AUX插座输入(Signal From AUX Jack Input)。5,测试以音量最大,音调和平衡在中央位置(电子音调在正常状态)。(Test Volume Setup Max,Equalizer And Balance Setup Center)。6,标准輸出(Standard Output):A.输入1 KHz频率信号(Input 1 KHz Frequency Signal)B.左右声道输入信号测试右声道(L&R Input Signal Test Use R CHANNEL)C.额定输出功率満(Rating Output Power Full)10 W,标准输出定为1w.(Rating Output Power Full 10 w,Standard Output Setup 1 W)D.额定输出功率1W到10w,标准输出定为500 mW(Rating Output Power 1 W To 10 W,Standard Output Setup 500 mW)E.额定输出功率小于1w,标准输出定为50 mW(Rating Output Power Not Full 1 W,Standard Output Setup 50 mW)F.标准輸出电压以V-VPR为准(Standard Output Voltage Use V-V/PR)。G.V-V/PR中P为额定输出功率,R为喇叭标称阻抗。

    标签: 音响功放

    上传时间: 2022-06-18

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  • IGBT图解

    le flows through MOS CHANNEL while Ih flows across PNP transistor Ih= a/(1-a) le, IE-le+lh=1/(1-a)' le Since IGBT has a long base PNP, a is mainly determined by ar si0 2ar= 1/cosh(1/La), La: ambipolar diff length a-0.5 (typical value)p MOSFET CHANNEL current (saturation), le=U"Cox"W(2"Lch)"(Vc-Vth)le Thus, saturated collector current Ic, sat=1/(1-a)"le=-1/(1-a)"UCox"W/(2Lch)"(Vo-Vth)2Also, transconductance gm, gm= 1/(1-a)"u' Cox W/Lch*(Vo-Vth)Turn-On1. Inversion layer is formed when Vge>Vth2. Apply positive collector bias, +Vce3. Electrons flow from N+ emitter to N-drift layer providing the base current for the PNP transistor4. Since J1 is forward blased, hole carriers are injected from the collector (acts as an emitter).5. Injected hole carriers exceed the doping level of N-drift region (conductivity modulation). Turn-Off1. Remove gate bias (discharge gate)2. Cut off electron current (base current, le, of pnp transistor)

    标签: igbt

    上传时间: 2022-06-20

    上传用户:wangshoupeng199

  • 激光雷达测距新方法研究

    无扫描激光雷达测距成像技术和其他测距系统相比具有可对动态物体清晰成像,功耗低,体积小,成本低廉的优点。无论在军事上,还是在民用上都有非常重要的地位,是激光需达的重点研究方向。本论文介绍了四种基于不同原理的无扫描激光雷达方案。其中基于脉冲增益调制法的无扫描激光雷达具有很强的创造性,该方案使用脉冲光源,脉冲光源发出脉冲光照射目标物体,经物体反射后由功能光接收器MCP(Micro CHANNEL Plate)接收,对MCP施加线性增益调制,在MCP输出端形成新的光场,由CCD(Charge Couple Device)接收.CCD输出的图像经图像处理后得到二维图像信息。该方案对背景光干扰不敏感,可成像距离远,具有很大的研究价值。本文设计了一套模拟系统来验证基于脉冲调制法的无扫描激光雷达测距方案的可行性,由于光电倍增管PMr(Photoelectric electron-multiplier tube)在功能上和MCP具有最大的相似性,所以模拟系统中功能光接收器采用光电倍增管。系统由激光驱动模块、PMT驱动模块、时序控制模块、采样接收模块四个部分组成。我们利用自行研制的模拟系统进行了大量的模拟实验,经过对实验结果分析发现该模拟系统的测量距离可达到1千米,测量误差在15米以内,表明了该方案是确实可行的。论文最后对误差来源进行了分析,并对整个项目进行了总结和展望。

    标签: 激光雷达 测距

    上传时间: 2022-06-22

    上传用户:slq1234567890

  • pcie处理层协议中文详解

    pcie(PCI-Express)处理层协议中文详解处理层协议(transaction Layer specification)◆TLP概况。◆寻址定位和路由导向。◆i/o,.memory,configuration,message request、completion 详解。◆请求和响应处理机制。◆virtual CHANNEL(ve)Mechanism虚拟通道机制。◆data integrity 数据完整性。一.TLP概况处理层(transaction Layer specification)是请求和响应信息形成的基础。包括四种地址空间,三种处理类型,从下图可以看出在transaction Layer中形成的包的基本概括。一类是对io口和memory的读写包(TLPS:transaction Layers packages),另一类是对配置寄存器的读写设置包,还有一类是信息包,描述通信状态,作为事件的信号告知用户。对memory的读写包分为读请求包和响应包、写请求包(不需要存储器的响应包)。而io类型的读写请求都需要返回I/O口的响应包,

    标签: pcie

    上传时间: 2022-06-30

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  • MT7628 Datasheet

    Overview The MT7628 router-on-a-chip includes an 802.11n MAC and baseband,a 2.4 GHz radio and FEM,a 575/580MHz MIPS? 24K% CPU core,a 5-port 10/100 fast ethernet switch. The MT7628 includes everything needed to build an AP router from a single chip. The embedded high performance CPU can process advanced applications effortlessly, such as routing, security and VolP. The MT7628 also includes a selection of interfaces to support a variety of applications, such as a USB port for accessing external storage.Features· Embedded MIPS24KEc(575/580 MHz) with 64KBl-Cache and 32 KB D-Cache·2T2R 2.4 GHz with 300 Mbps PHY data rate· Legacy 802.11b/g and HT 802.11n modes·20/40 MHz CHANNEL bandwidth· Reverse Data Grant(RDG)· Maximal Ratio Combining(MRC)· Space Time Block Coding(STBC)· MCM 8 Mbytes DDR1 KGD(MT7628KN)

    标签: mt7628

    上传时间: 2022-07-18

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  • AD5410、AD5420 datasheet

    Single-CHANNEL,  Serial Input, 4 mA to20 mA, Current Source DAC, HART Connectivity

    标签: AD5410 AD5420

    上传时间: 2022-07-24

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  • MT7628手册(英文版)

    The following table covers the main features offered by the MT7628KN and MT7628AN. Overall, the MT7628KN supports the requirements of an entry level AP/router, while the more advanced MT7628AN supports a number of interfaces together with a large maximum RAM capacity.Features· Embedded MIPS24KEc (575/580 MHz) with 64KBl-Cache and 32KB D-Cache·2T2R 2.4GHz with 300 Mbps PHY data rate· Legacy 802.11b/g and HT 802.11n modes·20/40 MHz CHANNEL bandwidth· Reverse Data Grant(RDG)· Maximal Ratio Combining(MRC)· Space Time Block Coding(STBC)· MCM 8 Mbytes DDR1 KGD(MT7628KN)·16-bit DDR1/2 up to 128/256 Mbytes(MT7628AN/KN)· SPI/SD-XC/eMMC·x1 USB 2.0 Host,x1 Ple Root Complex·5-port 10/100 FE PHY

    标签: mt7628

    上传时间: 2022-07-25

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