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  • 基于AVR单片机Mega16的电子时钟设计

    Mega16是一款采用先进RISC精简指令,内置A/D的8位单片机,可支持低电压联机 Flash和EEPROM 写入功能;同时还支持 Basic和C 等高级语言编程。用它设计电子时钟不仅成本低,硬件简单,而且很容易实现系统移植。介绍了如何利用AVR系列单片机Mega16及1602字符液晶来设计电子时钟的方法,同时给出了相应的电路原理及部分语言程序。 Abstract:  ?Mega16 is a high-performance, low power consumption, the use of advanced RISC concise instructions, Built-in A/D 8-bit microcontrollers, the on-line support for low-voltage Flash, EEPROM write function. Except Mega16 also support the Basic, C, and other high-level language programming.The electronic clock which is deisgned by Mega16 is not only low-cost, simple hardware, but easy to achieve system migration.The design method of electrioic clock based on the AVR Mega16 and character LCD1602 is introduced in this paper,and the corresponding circuit electrionic and some language program are given.

    标签: Mega AVR 16 单片机

    上传时间: 2014-12-27

    上传用户:zl5712176

  • Replacement of NXP PCA9518 wit

    The outputs of the PCA9518 are immediately available as soon as there is a voltage present on thesupply >~1V and behave as described above. The power-on reset of the PCA9518A keeps the outputsturned off during power-up and maintains the high impedance of the outputs throughout the power-upcycle. There is an additional Built-in delay after power-up that allows the analog circuits to stabilize beforethe part is activated.

    标签: Replacement 9518 NXP PCA

    上传时间: 2013-10-26

    上传用户:13817753084

  • 87C576微控制器的在线编程

    The 87C576 includes two separate methods of programming theEPROM array, the traditional modified Quick-Pulse method, and anew On-Board Programming technique (OBP).Quick Pulse programming is a method using a number of devicepins in parallel (see Figure 1) and is the traditional way in which87C51 family members have been programmed. The Quick-Pulsemethod supports the following programming functions:– program USER EPROM– verify USER EPROM– program KEY EPROM– program security bits– verify security bits– read signature bytesThe Quick-Pulse method is quite easily suited to standardprogramming equipment as evidenced by the numerous vendors of87C51 compatible programmers on the market today. Onedisadvantage is that this method is not well suited to programming inthe embedded application because of the large number of signallines that must be isolated from the application. In addition, parallelsignals from a programmer would need to be cabled to theapplication’s circuit board, or the application circuit board wouldneed to have logic Built-in to perform the programming functions.These requirements have generally made in-circuit programmingusing the modified Quick Pulse method impractical in almost all87C51 family applications.

    标签: 87C576 微控制器 编程

    上传时间: 2013-10-21

    上传用户:xiaozhiqban

  • XAPP708 -133MHz PCI-X到128MB DDR小型DIMM存储器桥

      The Virtex-4 features, such as the programmable IDELAY and Built-in FIFO support, simplifythe bridging of a high-speed, PCI-X core to large amounts of DDR-SDRAM memory. Onechallenge is meeting the PCI-X target initial latency specification. PCI-X Protocol Addendum tothe PCI Local Bus Specification Revision 2.0a ([Ref 6]) dictates that when a target signals adata transfer, "the target must do so within 16 clocks of the assertion of FRAME#." PCItermination transactions, such as Split Response/Complete, are commonly used to meet thelatency specifications. This method adds complexity to the design, as well as additional systemlatency. Another solution is to increase the ratio of the memory frequency to the PCI-X busfrequency. However, this solution increases the required power and clock resource usage.

    标签: PCI-X XAPP DIMM 708

    上传时间: 2013-11-24

    上传用户:18707733937

  • 赛灵思电机控制开发套件简介(英文版)

      The power of programmability gives industrial automation designers a highly efficient, cost-effective alternative to traditional motor control units (MCUs)。 The parallel-processing power, fast computational speeds, and connectivity versatility of Xilinx® FPGAs can accelerate the implementation of advanced motor control algorithms such as Field Oriented Control (FOC)。   Additionally, Xilinx devices lower costs with greater on-chip integration of system components and shorten latencies with high-performance digital signal processing (DSP) that can tackle compute-intensive functions such as PID Controller, Clark/Park transforms, and Space Vector PWM.   The Xilinx Spartan®-6 FPGA Motor Control Development Kit gives designers an ideal starting point for evaluating time-saving, proven, motor-control reference designs. The kit also shortens the process of developing custom control capabilities, with integrated peripheral functions (Ethernet, PowerLink, and PCI® Express), a motor-control FPGA mezzanine card (FMC) with Built-in Texas Instruments motor drivers and high-precision Delta-Sigma modulators, and prototyping support for evaluating alternative front-end circuitry.

    标签: 赛灵思 电机控制 开发套件 英文

    上传时间: 2013-10-28

    上传用户:wujijunshi

  • Full support for extended regular expressions (those with intersection and complement); Support for

    Full support for extended regular expressions (those with intersection and complement); Support for some kinds of cycles in grammar; DFA-based operation; Unicode support; C++ only, requires a modern compiler; Lexical analyzers can be configured to get symbols from any input class (Built-in support for std::istream, std::wistream and FILE *); Designed to work with Whale, but can work standalone or interface to other parsers.

    标签: intersection expressions complement for

    上传时间: 2013-12-11

    上传用户:zhanditian

  • 内容如下: 1.The history of the computerized database 2.SQL Data Statements--those used to create, mani

    内容如下: 1.The history of the computerized database 2.SQL Data Statements--those used to create, manipulate, and retrieve data stored in your database example statements include select, update, insert, and delete 3.SQL Schema Statements--those used to create database objects, such as tables, indexes, and constraints 4.How data sets can interact with queries 5.The importance of subqueries 6.Data conversion and manipulation via SQL s Built-in functions 7.How conditional logic can be used in Data Statements

    标签: computerized Statements database history

    上传时间: 2015-04-25

    上传用户:ardager

  • This example program shows how to configure and use the A/D Converter of the following microcontroll

    This example program shows how to configure and use the A/D Converter of the following microcontroller: STMicroelectronics ST10F166 After configuring the A/D, the program reads the A/D result and outputs the converted value using the serial port. To run this program... Build the project (Project Menu, Build Target) Start the debugger (Debug Menu, Start/Stop Debug Session) View the Serial Window (View Menu, Serial Window #1) View the A/D converter peripheral (Peripheral Menu, A/D Converter) Run the program (Debug Menu, Go) A debug script (debug.ini) creates buttons that set different analog values in A/D channels. As the program runs, you will see the A/D input and output change. Other buttons create signals that generate sine wave or sawtooth patterns as analog inputs. µ Vision3 users may enable the Built-in Logic Analyzer to view, measure and compare these input signals graphically.

    标签: microcontroll Converter configure following

    上传时间: 2014-12-01

    上传用户:独孤求源

  • This OpenNL, a library to easily construct and solve sparse linear systems. * OpenNL is supplied wi

    This OpenNL, a library to easily construct and solve sparse linear systems. * OpenNL is supplied with a set of Built-in iterative solvers (Conjugate gradient,BICGSTAB, GMRes) and preconditioners (Jacobi, SSOR). * OpenNL can also use other solvers (SuperLU 3.0 is supported as an OpenNL extension,MUMPS will be supported in a future version)

    标签: OpenNL construct supplied library

    上传时间: 2014-01-07

    上传用户:semi1981

  • This lab exercise will introduce you to the AccelWare IP generators. AccelWare is a library of over

    This lab exercise will introduce you to the AccelWare IP generators. AccelWare is a library of over fifty IP generators, available in the form of three toolkits that produce synthesizable MATLAB for common MATLAB built in and toolbox functions. Each generator offers macro and micro-architecture selections that allow full customization of the generated model to the target application requirements.

    标签: AccelWare generators introduce exercise

    上传时间: 2013-12-16

    上传用户:2467478207