基于ARM11的嵌入式视频处理终端设计 在研究了基于ARMl 1体系结构的Samsung$3C6410处理器的基 础上，给出了多格式视频编解码的使用方法和Windows CE下中断流 驱动的设计方法，为Windows CE操作系统下的图像采集和视频处理 的复杂控制提供了软件实现的方法；并以该处理器为核心，加上外部 存储器和USB摄像头等接口电路，完成了一个嵌入式视频处理终端 核心板的硬件原理图设计和PCB图的设计，并对视频处理终端的印 制电路板的电磁兼容进行了研究。 首先对嵌入式系统和视频处理进行了简单的介绍，指出了采用 $3C6410处理器设计的视频处理终端具有的优势。其次，对$3C6410 多格式视频编解码的使用进行了仔细分析，为多格式视频编解码软件 的编写提供了思路。给出了Windows CE下中断流驱动程序的设计方 法，为主处理器和BIT处理器在Windows CE下中断流驱动的设计提 供了一种较为通用的参考模型。第三，在熟悉了S3C64lO处理器的 体系结构基础上设计出了下列电路原理图：电源及复位电路，时钟电 路，DDR SDRAM和FLASH存储器电路，USB接口电路，串口电路， JTAG接口电路，LCD和TSP接口电路。整个嵌入式视频处理终端是 一个可以独立工作的可扩展系统，该系统主要用于图像采集和视频编 解码功能。另外，分别从滤波和接地等电磁兼容性设计手段出发，对 这些方法进行了理论分析，提出了提高视频处理终端电磁兼容的措 施。最后，通过编写简单的应用程序，视频处理终端对图像进行H．264 编码，可以通过无线网卡进行传输编码后的图像。测试结果表明，视 频处理终端能够实现视频图像的拍摄、压缩、无线视频传送和视频监 控等功能。
上传时间： 2013-11-22
上传用户：谁偷了我的麦兜
The NCV7356 is a physical layer device for a single wire data linkcapable of operating with various Carrier Sense Multiple Accesswith Collision Resolution (CSMA/CR) protocols such as the BoschController Area Network (CAN) version 2.0. This serial data linknetwork is intended for use in applications where high data rate is notrequired and a lower data rate can achieve cost reductions in both thephysical media components and in the microprocessor and/ordedicated logic devices which use the network.The network shall be able to operate in either the normal data ratemode or a high-speed data download mode for assembly line andservice data transfer operations. The high-speed mode is onlyintended to be operational when the bus is attached to an off-boardservice node. This node shall provide temporary bus electrical loadswhich facilitate higher speed operation. Such temporary loads shouldbe removed when not performing download operations.The bit rate for normal communications is typically 33 kbit/s, forhigh-speed transmissions like described above a typical bit rate of83 kbit/s is recommended. The NCV7356 features undervoltagelockout, timeout for faulty blocked input signals, output blankingtime in case of bus ringing and a very low sleep mode current.
上传时间： 2013-10-24
上传用户：s蓝莓汁
概要2 个对称的600MHz 高性能Blackfin 内核328K Bytes 片内存储器每个 Blackfin 内核包括:2 个16 位MAC，2 个40 位ALU，4 个8 位视频ALU，以及1 个40 位移位器RISC 式寄存器和指令模型，编程简单，编译环境友好先进的调试、跟踪和性能监视内核电压 0.8V-1.2V，片内调压器可调兼容 3.3V 及2.5V I/O256 引脚Mini-BGA 和297 引脚PBGA 两种封装外设两个并行输入/输出外围接口单元，支持ITU-R 656 视频数据格式，可与ADI 的模拟前端ADC 无缝连接2 个双通道全双工同步串行接口，支持8 个立体声I2S 通道2 个16 通道DMA 控制器和1 个内部存储器DMA 控制器SPI 兼容端口12 个通用32-bit 定时/计数器，支持PWMSPI 兼容端口支持 IrDA 的UART2 个“看门狗”定时器48 个可编程标志引脚1x-63x 倍频的片内PLL
上传时间： 2013-11-06
上传用户：YUANQINHUI
The LPC2292/2294 microcontrollers are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, together with 256 kB of embedded high-speed flash memory. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical code size applications, the alternative 16-bit Thumb mode reduces code by more than 30 pct with minimal performance penalty. With their 144-pin package, low power consumption, various 32-bit timers, 8-channel 10-bit ADC, 2/4 (LPC2294) advanced CAN channels, PWM channels and up to nine external interrupt pins these microcontrollers are particularly suitable for automotive and industrial control applications as well as medical systems and fault-tolerant maintenance buses. The number of available fast GPIOs ranges from 76 (with external memory) through 112 (single-chip). With a wide range of additional serial communications interfaces, they are also suited for communication gateways and protocol converters as well as many other general-purpose applications. Remark: Throughout the data sheet, the term LPC2292/2294 will apply to devices with and without the /00 or /01 suffix. The suffixes /00 and /01 will be used to differentiate from other devices only when necessary.
上传时间： 2014-12-30
上传用户：aysyzxzm
Abstract: With industrial/scientific/medical (ISM) band radio frequency (RF) products, often times users are new to the structure of Maxim's low pin-count transmitters andfully integrated superheterodyne receivers. This tutorial provides simple steps that can be taken to get the best performance out of these transmitters and receivers whileproviding techniques to measure the overall capability of the design.
上传时间： 2013-11-02
上传用户：yph853211
Abstract: When people want portable music, they usually rely on battery-powered audio devices. With a bit of engineeringblood (or curiosity) running in your veins, it is not difficult to build a wireless Bluetooth® stereo audio system that can becontrolled with any device that has a Bluetooth connection and a music player
上传时间： 2013-10-09
上传用户：天空说我在
Abstract: This application note illustrates the flexibility of the MAX7060 ASK/FSK transmitter. While the currently available evaluationkit (EV kit) has been optimized for the device's use in a specific frequency band (i.e., 288MHz to 390MHz), this document addresseshow the EV kit circuitry can be modified for improved operation at 433.92MHz, a frequency commonly used in Europe. Twoalternative match and filter configurations are presented: one for optimizing drain efficiency, the other for achieving higher transmitpower. Features and capabilities of earlier Maxim industrial, scientific, and medical radio-frequency (ISM-RF) transmitters areprovided, allowing comparison of the MAX7060 to its predecessors. Several design guidelines and cautions for using the MAX7060are discussed.
上传时间： 2013-11-14
上传用户：swaylong
The NXP LPC314x combine a 270 MHz ARM926EJ-S CPU core, High-speed USB 2.0OTG, 192 KB SRAM, NAND flash controller, flexible external bus interface, three channel10-bit A/D, and a myriad of serial and parallel interfaces in a single chip targeted atconsumer, industrial, medical, and communication markets. To optimize system powerconsumption, the LPC314x have multiple power domains and a very flexible ClockGeneration Unit (CGU) that provides dynamic clock gating and scaling.
上传时间： 2013-10-11
上传用户：yuchunhai1990
本软件是关于MAX338, MAX339的英文数据手册：MAX338, MAX339 8通道/双4通道、低泄漏、CMOS模拟多路复用器 The MAX338/MAX339 are monolithic, CMOS analog multiplexers (muxes). The 8-channel MAX338 is designed to connect one of eight inputs to a common output by control of a 3-bit binary address. The dual, 4-channel MAX339 is designed to connect one of four inputs to a common output by control of a 2-bit binary address. Both devices can be used as either a mux or a demux. On-resistance is 400Ω max, and the devices conduct current equally well in both directions. These muxes feature extremely low off leakages (less than 20pA at +25°C), and extremely low on-channel leakages (less than 50pA at +25°C). The new design offers guaranteed low charge injection (1.5pC typ) and electrostatic discharge (ESD) protection greater than 2000V, per method 3015.7. These improved muxes are pin-compatible upgrades for the industry-standard DG508A and DG509A. For similar Maxim devices with lower leakage and charge injection but higher on-resistance, see the MAX328 and MAX329.
上传时间： 2013-11-12
上传用户：18711024007
This example provides a description of how to use the USART with hardware flowcontrol and communicate with the Hyperterminal.First, the USART2 sends the TxBuffer to the hyperterminal and still waiting fora string from the hyperterminal that you must enter which must end by '\r'character (keypad ENTER button). Each byte received is retransmitted to theHyperterminal. The string that you have entered is stored in the RxBuffer array. The receivebuffer have a RxBufferSize bytes as maximum. The USART2 is configured as follow: - BaudRate = 115200 baud - Word Length = 8 Bits - One Stop Bit - No parity - Hardware flow control enabled (RTS and CTS signals) - Receive and transmit enabled - USART Clock disabled - USART CPOL: Clock is active low - USART CPHA: Data is captured on the second edge - USART LastBit: The clock pulse of the last data bit is not output to the SCLK pin
上传时间： 2013-10-31
上传用户：yy_cn
