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Agile-flow

  • ESD_protection_for_RF_and_AMS_ICs

    This paper reviews key factors to practical ESD protection design for RF and analog/mixed-signal (AMS) ICs, including general challenges emerging, ESD-RFIC interactions, RF ESD design optimization and prediction, RF ESD design characterization, ESD-RFIC co-design technique, etc. Practical design examples are discussed. It means to provide a systematic and practical design flow for whole-chip ESD protection design optimization and prediction for RF/AMS ICs to ensure 1 st Si design success.

    标签: ESD_protection_for_RF_and_AMS_ICs

    上传时间: 2020-06-05

    上传用户:shancjb

  • Value+Driven+Product+Planning+and+Systems

    The “bottom-line” metrics of cash flow, demand, price, and return on investment are driven by a second set of financial metrics represented by value to the customer, cost, and the pace of innovation. Get them right relative to competition and impressive bottom-line results should follow. Because of their importance, we call value to the customer, variable cost, and the pace of innovation the “fundamental metrics.” 

    标签: Planning Product Systems Driven Value and

    上传时间: 2020-06-06

    上传用户:shancjb

  • Observers in Control Systems

    Control systems are used to regulate an enormous variety of machines, products, and processes. They control quantities such as motion, temperature, heat flow, fluid flow, fluid pressure, tension, voltage, and current. Most concepts in control theory are based on having sensors to measure the quantity under control. In fact, control theory is often taught assuming the availability of near-perfect feedback signals. Unfortunately, such an assumption is often invalid. Physical sensors have shortcomings that can degrade a control system.

    标签: Observers Control Systems in

    上传时间: 2020-06-10

    上传用户:shancjb

  • 华为敏捷园区解决方案终端安全技术白皮书(Forescout)

    华为敏捷园区解决方案终端安全技术白皮书(Forescout)1 用户准入检查,保证身份合法: 在用户访问网络访问之前验证用户的身份,只有合法的用户才允许接入网络。这就是 基于用户身份的准入机制,包括 802.1x,Portal,MAC bypass 这几种典型的认证方式。 准入检查由客户端+网络设备+AAA 服务器组成。在 Agile Campus 解决方案中,AAA 服务器可以使用自研的 Agile Controller-Campus 1.0,也可以与第三方 Server 对接,例 如 Cisco ISE 系统。 2 终端合规性检查,保证终端合规: 检查用户使用的终端是否符合企业制定的安全策略,例如防病毒和操作系统补丁策 略。可疑或有问题的主机将被隔离或限制网络接入范围,直到它经过修补或采取了相 应的安全措施为止。 终端合规检查由客户端+服务器组成,该系统可以独立部署。若需要将合规检查结果作 为 NAC 控制条件,AAA 系统必须与终端合规检查服务器实现联动。 在 Agile Campus 解决方案中,终端合规检查采用集成第三方厂家方式实现。 3 业务随行,保证用户业务一致性体验 基于安全组的策略规划,实现全网策略的统一部署与自动同步,确保全网策略一致, 让用户自由移动时享受一致的业务体验。 业务随行由网络设备+AAA 服务器+策略服务器组成。在 Agile Campus 解决方案中,若 客户希望同时部署终端合规检查和业务随行,需要部署 Agile Controller-Campus 1.0, 同时集成合规检查服务器。

    标签: 华为敏捷园区

    上传时间: 2022-02-28

    上传用户:

  • 用IAP技术在线升级STM32单片机固件

    针对嵌入式产品程序更新问题,提出了一种基于IAP技术的STM32单片机在线固件升级方案,设计了STM32单片机最小系统硬件电路和USB转串口通信电路,并给出了Bootloader程序、APP程序、PC上机程序的实现流程.实验结果表明,该方案具有简单实用、稳定性高、维护成本低和设备使用效率高的特点,适用于嵌入式产品升级.For the problem of updating embedded products program,an online firmware upgrade scheme of STM32 single chip microcomputer based on IAP technology is proposed.This scheme not only elaborates the principle of IAP technology in detail but also provides the design of the minimum system hardware circuit of STM32 MCU,the design of USB for serial communication circuit,and the implementation flow of Bootloader program,APP program and PC program.The experiment results show that the scheme is simple,practical and highly stable.In addition,it can be used to actual embedded product upgrading,significantly reducing maintenance costs and improving the efficiency of equipment.

    标签: iap stm32 单片机

    上传时间: 2022-03-25

    上传用户:

  • 电动汽车直流充电桩的硬件系统设计

    在全球气候变暖和石油资源短缺的形势下,推动新能源汽车的发展将成为汽车行业一种新的发展方向。在大力发展新能源电动汽车行业的同时还应兼顾电动汽车充电设施的发展,因此对电动汽车充电桩的设计与研究显得十分必要。对电动汽车直流充电桩的硬件系统进行设计,主要的硬件电路包括安全监测电路、总压采集电路、温湿度检测电路、语音电路。软件包括主要流程图和温湿度检测流程图。Under the situation of global warming and shortage of petroleum resources,promoting the development of new energy vehicles will become a new development direction for the automotive industry.While vigorously developing the new energy electric vehicle industry,we should also take into account the development of electric vehicle charging facilities.Therefore,the design and research of electric vehicle charging piles is very necessary.The hardware system of the electric vehicle DC charging pile is designed.The main hardware circuits include safety monitoring circuit,total voltage collecting circuit,temperature and humidity detecting circuit,voice circuit and CAN communication.The software includes a main flow chart and a temperature and humidity detection flow chart.

    标签: 电动汽车

    上传时间: 2022-04-03

    上传用户:jason_vip1

  • 基于TMS320F28335的超声波流量计硬件原理图+软件源码

    基于TMS320F28335的超声波流量计硬件原理图+软件源码本文以TMS320F28335 处理器为核心,设计一种用于管道流量测量的超声波流量计。系统硬件由核心板,超声波发射和接收电路,切换电路,超声换能器,基于ADS805 的高速信号采集电路,人机交互以及电源等模块构成。采用时差法进行管道流量测量,时差测量采用SCOT 加权的广义互相关时延估计算法。本论文设计的超声波流量计具有测量速度快、准确性好、成本低等优点。关键字:C2000,超声波,流量,广义互相关算法AbstractA kind of ultrasonic flowmeter using for the pipe flow measurement is designed based onTMS320F28335 in this paper. The system hardware consists of the following parts: the core board,ultrasonic signal transmitter and receiver circuits, switch circuit, ultrasonic transducer, signalacquisition circuit based on ADS805, human-computer interaction module and power supplymodule, etc. The system use the method of time difference for pipeline flow measurement and thetime difference is calculated by the time-delay algorithm of SCOT weighted generalizedcross-correlation. The ultrasonic flowmeter has the features of high testing speed, high precisionand low cost, etc.Keywords: C2000,Ultrasonic, Flow, Generalized Cross-Correlation Algorithm

    标签: tms320f28335 超声波流量计

    上传时间: 2022-05-06

    上传用户:

  • Vivado设计流程指导手册-含安装流程与仿真

    Vivado设计分为Project Mode和Non-project Mode两种模式,一般简单设计中,我们常用的是Project Mode。在本手册中,我们将以一个简单的实验案例,一步一步的完成Vivado的整个设计流程一、新建工程1、打开Vivado 2013.4开发工具,可通过桌面快捷方式或开始菜单中xilinx DesignTools-Vivado 2013.4下的Vivado 2013.4打开软件,开启后,软件如下所示:2、单击上述界面中Create New Project图标,弹出新建工程向导,点击Next.3、输入工程名称、选择工程存储路径,并勾选Create project subdirectory选项,为工程在指定存储路径下建立独立的文件夹。设置完成后,点击Next注意:工程名称和存储路径中不能出现中文和空格,建议工程名称以字母、数字、下划线来组成。4、选择RTL Project一项,并勾选Do not specifty sources at this time,勾选该选项是为了跳过在新建工程的过程中添加设计源文件。点击Next.IA5、根据使用的FPGA开发平台,选择对应的FPGA目标器件。(在本手册中,以xilinx官方开发板KC705为例,Nexys4开发板请选择Artix-7 XC7A100TCSG324-2的器件,即Family和Subfamily均为Artix-7,封装形式(Package)为cSG324,速度等级(Speed grade)为-1,温度等级(Temp Grade)为C)。点击Next6、确认相关信息与设计所用的的FPGA器件信息是否一致,一致请点击Finish,不一致,请返回上一步修改。二、设计文件输入1、如下图所示,点击Flow Navigator下的Project Manager->Add Sources或中间Sources中的对话框打开设计文件导入添加对话框。2、选择第二项Add or Create Design Sources,用来添加或新建Verilog或VHDL源文件,点击Next

    标签: vivado

    上传时间: 2022-05-28

    上传用户:默默

  • IGBT图解

    le flows through MOS channel while Ih flows across PNP transistor Ih= a/(1-a) le, IE-le+lh=1/(1-a)' le Since IGBT has a long base PNP, a is mainly determined by ar si0 2ar= 1/cosh(1/La), La: ambipolar diff length a-0.5 (typical value)p MOSFET channel current (saturation), le=U"Cox"W(2"Lch)"(Vc-Vth)le Thus, saturated collector current Ic, sat=1/(1-a)"le=-1/(1-a)"UCox"W/(2Lch)"(Vo-Vth)2Also, transconductance gm, gm= 1/(1-a)"u' Cox W/Lch*(Vo-Vth)Turn-On1. Inversion layer is formed when Vge>Vth2. Apply positive collector bias, +Vce3. Electrons flow from N+ emitter to N-drift layer providing the base current for the PNP transistor4. Since J1 is forward blased, hole carriers are injected from the collector (acts as an emitter).5. Injected hole carriers exceed the doping level of N-drift region (conductivity modulation). Turn-Off1. Remove gate bias (discharge gate)2. Cut off electron current (base current, le, of pnp transistor)

    标签: igbt

    上传时间: 2022-06-20

    上传用户:wangshoupeng199

  • DAC8568驱动程序

    This example shows how you can use signal functions in the Visiondebugger to simulate a signal that is coming into one of the analog inputs of the LPC21xx.The Measure example is described in detail in the Getting StartedUser's Guide.The MEASURE  example program is available for several targets:Simulator: uVision Simulator for LPC2129MCB2100:   Keil MCB2100 evaluation board with ULINK debugger           - Application is loaded to internal Flash.           - Switch S2 (INT1) is used as GPIO and sampled             (jumper positions: J1= off, J7= on)           - potentiometer POT1 is sampled as AIN0             (jumper position: J2= on)           - serial port COM1 parameters: 9600 baud, no parity,             8-bits, 1 stop bit, flow control noneMCB2130:   Keil MCB2130 evaluation board with ULINK debugger           - Application is loaded to internal Flash.           - Switch S2 (INT1) is used as GPIO and sampled             (jumper positions: J1= off, J7= on)           - potentiometer POT1 is sampled as AIN1             (jumper position: J2= on)           - serial port COM1 parameters: 9600 baud, no parity,             8-bits, 1 stop bit, flow control none

    标签: dac8568

    上传时间: 2022-06-28

    上传用户: