This Verilog HDL description implements a UART.
标签: description implements Verilog This
上传时间: 2013-12-17
上传用户:wff
this a Uart source code using Verilog.
上传时间: 2016-05-19
上传用户:zsjzc
This Verilog HDL description implements a UART Version 1.1 : Original Creation 2.1 : added comments
标签: description implements Creation Original
上传时间: 2016-05-27
上传用户:1109003457
This is a uart source written by VHDL .widely used and compatible with Whibone.
标签: compatible Whibone written source
上传时间: 2013-12-22
上传用户:cxl274287265
intercept tty is using for listening a UART conversation
标签: conversation intercept listening using
上传时间: 2017-04-12
上传用户:wangdean1101
Abstract: Designers who must interface 1-Wire temperature sensors with Xilinx field-programmable gate arrays(FPGAs) can use this reference design to drive a DS28EA00 1-Wire slave device. The downloadable softwarementioned in this document can also be used as a starting point to connect other 1-Wire slave devices. The systemimplements a 1-Wire master connected to a UART and outputs temperature to a PC from the DS28EA00 temperaturesensor. In addition, high/low alarm outputs are displayed from the DS28EA00 PIO pins using LEDs.
标签: PicoBlaze Create Master Xilinx
上传时间: 2013-11-05
上传用户:a6697238
Abstract: Designers who must interface 1-Wire temperature sensors with Xilinx field-programmable gate arrays(FPGAs) can use this reference design to drive a DS28EA00 1-Wire slave device. The downloadable softwarementioned in this document can also be used as a starting point to connect other 1-Wire slave devices. The systemimplements a 1-Wire master connected to a UART and outputs temperature to a PC from the DS28EA00 temperaturesensor. In addition, high/low alarm outputs are displayed from the DS28EA00 PIO pins using LEDs.
标签: PicoBlaze Create Master Xilinx
上传时间: 2013-11-12
上传用户:大三三
SDRAM 参考设计:主要包括The following figure shows a high-level block diagram for this reference design followed by a brief description of each sub-section. The design consists of: · PowerPC processor · PLB-OPB bridge · BlockRAM Memory Controller · SDRAM Controller · Two GPIO ports · A UART Port · External SDRAM
标签: high-level following reference diagram
上传时间: 2013-12-15
上传用户:Miyuki
B300-B300SP2 功能差异.xlsxM531X DM流程_v2.0.pdfM531X HTTP AT指令手册v1.4.pdfM531X MQTT 使用指导_v1.3.pdfM531X OneNET 参考手册_v1.6.pdfM5310 & M5310-A差异文档.pdfM5310A AT Command B300SP5-MH0S04.pdfM5310-A FOTA 升级手册_v1.0.pdfM5310-A LWM2M AT指令手册v1.4.pdfM5310-A MBRH0S04更新日志.pdfM5310-A TCPIP应用指导_v1.2.pdfM5310-A UART低功耗应用指导_v1.0.pdfM5310-A_EVB用户使用指南V1.0.pdfM5310-A-MBRH0S02更新日志.pdfM5310-A-MBRH0S03更新日志.pdfM5310-A参考设计V1.5.pdfM5310-A硬件设计手册_V1.7.pdfM5310-封装.zipOneNET 平台FOTA 升级(NB-IOT)_v1.0.pdf
上传时间: 2022-06-24
上传用户:
Implementing a Software UART on the TMS320C54x with the McBSP and DMA
标签: Implementing the Software McBSP
上传时间: 2014-11-30
上传用户:tuilp1a