UART I/O and Memory Allocation Example for GNU The project GNU_IODemo shows how to use memory allocation routines (malloc) and char I/O (printf, scanf) via a serial interface with the GNU toolchain. The I/O functions are adapted for the Analog Devices ADuC7000 series using the SERIAL.C module. The example also shows the efficiency of the Keil CA ARM Compiler run-time library which is tuned for single chip systems.
标签： Allocation GNU_IODemo Example project
上传时间： 2015-05-04
上传用户：Amygdala
VHDL 关于2DFFT设计程序 u scinode1 ∼ scinode9.vhd: Every SCI node RTL vhdl code. The details can be seen in the following section. u 2dfft.vhd: The top module includes these scinodes and form a 3x3 SCI Torus network, and it support these sub-modules scinode1∼ scinode9 reset and clk and global_cnt signals to synchronous the sub-modules to simplify the overall design. u proj2.wfc: VSS simulation result that is the same as the ModelSim simulation result. u Pro2_2.wfc: VSS simulation result of another test pattern can’t cause overflow situation.
标签： scinode1 scinode details 2DFFT
上传时间： 2014-12-02
上传用户：15071087253
BurchED B5-X300 Spartan2e using XC2S300e device Top level file for 6809 compatible system on a chip Designed with Xilinx XC2S300e Spartan 2+ FPGA. Implemented With BurchED B5-X300 FPGA board, B5-SRAM module, B5-CF module and B5-FPGA-CPU-IO module
标签： compatible 300 Spartan2e BurchED
上传时间： 2015-07-07
上传用户：star_in_rain
encode.v The encoder syndrome.v Syndrome generator in decoder berlekamp.v Berlekamp algorithm in decoder chien-search.v Chien search and Forney algorithm in decoder decode.v The top module of the decoder inverse.v Computes multiplication inverse of an Galois field element test-bench.v The test fixture, and some brief notes on using the modules. data-rom.v A simple data source for testing run For those intelligence-challenged who can t run verilog LGPL The license
标签： Berlekamp berlekamp algorithm generator
上传时间： 2014-02-16
上传用户：fxf126@126.com
开发工具：ads1.2 主要IC：MCU：lpc2210(NXP) LCD驱动及控制IC：s6d012(samsung) 用途：lcd驱动开发入门，s6d0129开发参考 相关资料： 电路原理图 lcd driver guide/ tft lcd驱动原理及开发过程 lcd module document/ samsung的s6d0129的datasheet和液晶屏spec mcu document/ nxp的lpc2210中英文datasheet source code/s6d0129 driver/ 基于lpc2210平台的无操作系统lcd(s6d0129)驱动源代码 source code/s6d0129 driver with minigui/ 基于lpc2210平台的无操作系统lcd(s6d0129)驱动源代码，添加了minigui中间件，可实现复杂图形及文字显示
上传时间： 2014-11-28
上传用户：ainimao
KVM (for Kernel-based Virtual Machine) is a full virtualization solution for Linux on x86 hardware. It consists of a loadable kernel module (kvm.ko) and a userspace component. Using KVM, one can run multiple virtual machines running unmodified Linux or Windows images. Each virtual machine has private virtualized hardware: a network card, disk, graphics adapter, etc. The kernel component of KVM is included in mainline Linux, and will appear in Linux 2.6.20. KVM is open source software.
标签： virtualization Kernel-based for hardware
上传时间： 2015-08-20
上传用户：lijianyu172
Jan 04, 2007 1. Add SPI support, see spi.h and spi.c 2. Add driver.h 3. Modified keyboard module and display module 4. Add BitSet support, see bitset.h and bitset.c 5. Fixed some bugs Dec 25, 2006 1. Name this OS as AvrcX 2. Release AvrcX_1.0 alpha
上传时间： 2015-09-02
上传用户：
Linux driver for FujiFilm FinePix digital cameras in PC-CAM (i.e. webcam) mode driver/ Contains the driver sources. Compile with "make". Then as root, install with "make install". Type "modprobe finepix" to load the module. userspace/ Type "make" to compile. fpix: test program, independant of the driver. Uses libusb to directly access the camera and capture a frame, saved under frame.jpg. Will not work if the driver is loaded. fpixtest: test program. Uses V4L2 to capture an image. fpix-stress-v4l2: never ending (in theory) stress test derived from fpixtest.
标签： driver i.e. FujiFilm FinePix
上传时间： 2014-11-28
上传用户：chenxichenyue
3rd Generation Partnership Project Specification of the SIM Application Toolkit for the Subscriber Identity Module - Mobile Equipment (SIM - ME) interface (Release 4)
标签： Specification Application Partnership Generation
上传时间： 2015-09-17
上传用户：caozhizhi
This getting started exercise will guide you through the step-by-step process of transforming a MATLAB floating-point model into a hardware module that can be implemented in silicon (FPGA or ASIC). The design is a general purpose FIR filter taken from the AccelDSP Examples directory.
标签： step-by-step transforming exercise getting
上传时间： 2014-01-17
上传用户：VRMMO
