Digital CLock Upload!
资源简介:Digital CLock Upload!
上传时间: 2017-08-19
上传用户:小鹏
资源简介:My thesis entitled \"fpga Digital CLock,\" immature, to enlighten
上传时间: 2013-08-31
上传用户:smallfish
资源简介:Digital CLock in Assembly 我的一个大学满分VHDL作品,数字石英钟的模拟程序。
上传时间: 2014-01-25
上传用户:hullow
资源简介:My thesis entitled "fpga Digital CLock," immature, to enlighten
上传时间: 2014-01-02
上传用户:hxy200501
资源简介:Digital CLock!看了就知道了!很不错的东西!可以帮助你省下不少精力!
上传时间: 2014-11-08
上传用户:dbs012280
资源简介:it is a Digital CLock
上传时间: 2015-12-18
上传用户:teddysha
资源简介:Digital CLock Source using ATmega8515 and 7Segment
上传时间: 2014-01-24
上传用户:王庆才
资源简介:This document gives a project with title Digital CLock using labview.
上传时间: 2017-03-20
上传用户:风之骄子
资源简介:many application on kit SP-3: VGA, Digital CLock, counter, interface PS2....
上传时间: 2017-04-17
上传用户:talenthn
资源简介:use grapcic Dos C pain Digital CLock
上传时间: 2017-06-09
上传用户:xymbian
资源简介:Digital CLock and thermometer pic16f84
上传时间: 2014-01-24
上传用户:skfreeman
资源简介:Digital CLock using 8051 timer for atmel at89c52 or At89s52
上传时间: 2017-07-16
上传用户:xymbian
资源简介:Digital CLock arm sample code using for beginer
上传时间: 2017-07-19
上传用户:邶刖
资源简介:Programm that represents Digital CLock
上传时间: 2013-12-31
上传用户:liglechongchong
资源简介:This is the source code of a Digital CLock implemented using Atmel 8 bit AVR Controller(ATMega16). To fully understand it look at the hardware implementation shown in attached photo(pdf).
上传时间: 2014-08-18
上传用户:moshushi0009
资源简介:Java CLock is a FREE Java applet used to display a CLock on your Web pages. You can display either analog or Digital CLock. The full source code of this applet is also available (visit my home page to download it). You may use this applet o...
上传时间: 2014-01-12
上传用户:woshiayin
资源简介:本文利用Verilog HDL 语言自顶向下的设计方法设计多功能数字钟,突出了其作为硬件描述语言的良好的可读性、可移植性和易理解等优点,并通过Altera QuartusⅡ 4.1 和ModelSim SE 6.0 完成综合、仿真。此程序通过下载到FPGA 芯片后,可应用于实际的数字钟显示中...
上传时间: 2013-11-10
上传用户:hz07104032
资源简介:DDR SDRAM控制器的VHDL源代码,含详细设计文档。 The DDR, DCM, and SelectI/O™ features in the Virtex™ -II architecture make it the perfect choice for implementing a controller of a Double Data Rate (DDR) SDRAM. The Digital CLock M...
上传时间: 2014-11-01
上传用户:l254587896
资源简介:C++ Algorithms for Digital Signal Processing 第4章 滤波器程序
上传时间: 2013-08-01
上传用户:eeworm
资源简介:·[时钟书籍]Digital CLocks for Synchronization and Communications
上传时间: 2013-05-24
上传用户:tgeyangjh
资源简介:·[测试书籍]ESSENTIALS OF ELECTRONIC TESTING FOR Digital, MEMORY AND MIXED-SIGNAL VLSI CIRCUITS
上传时间: 2013-07-21
上传用户:euroford
资源简介:·Verilog HDL: A Guide to Digital Design and
上传时间: 2013-04-24
上传用户:谁偷了我的麦兜
资源简介:·Stanford&IBM牛人经典之作 - Digital Control of Dynamic SystemsEditorial ReviewsProduct DescriptionThis well-respected, market-leading text discusses the use of Digital computers in the real-time co
上传时间: 2013-07-31
上传用户:cuiyashuo
资源简介:Digital Down Converter Design based on FPGA.
上传时间: 2013-08-13
上传用户:CSUSheep
资源简介:直接数字频率合成(Direct Digital Fraquency Synthesis,即DDFS,一般简称DDS)是从相位概念出发直接合成所需要波形的一种新的频率合成技术。
上传时间: 2013-08-27
上传用户:wpt
资源简介:Fpga Implementation Of Digital Timing Recovery In Software Radio Receiver
上传时间: 2013-09-05
上传用户:panpanpan
资源简介: In this paper, we discuss efficient coding and design styles using verilog. This can beimmensely helpful for any Digital designer initiating designs. Here, we address different problems rangingfrom RTL-Gate Level simulation mismatch to...
上传时间: 2013-11-22
上传用户:han_zh
资源简介:Introduce High-Speed Digital System Design.
上传时间: 2013-10-20
上传用户:gps6888
资源简介:Abstract: This application note describes how sampling CLock jitter (time interval error or "TIE jitter") affectsthe performance of delta-sigma Digital-to-analog converters (DACs). New insights explain the importanceof separately specifying...
上传时间: 2013-10-25
上传用户:banyou
资源简介: This unique guide to designing Digital VLSI circuits takes a top-down approach, reflecting the natureof the design process in industry. Starting with architecture design, the book explains the why andhow of Digital design, using the ph...
上传时间: 2013-11-04
上传用户:life840315