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音频数模转换器DAC抖动的灵敏度分析

  • 资源大小:219 K
  • 上传时间: 2013-10-25
  • 上传用户:wuweixiong123
  • 资源积分:2 下载积分
  • 标      签: DAC 音频 数模转换器 抖动

资 源 简 介

Abstract: This application note describes how sampling clock jitter (time interval error or "TIE jitter") affectsthe performance of delta-sigma digital-to-analog converters (DACs). New insights explain the importanceof separately specifying low-frequency (< 2x passband frequency) and high-frequency or wideband (> 2xpassband frequency) jitter tolerance in these devices. The article also provides an application example ofa simple highly jittered cycle-skipped sampling clock and describes a method for generating a properbroadband jittered clock. The document then goes on to compare Maxim's audio DAC jitter tolerance tocompetitor audio DACs. Maxim's exceptionally high jitter tolerance allows very simple and low-cost sampleclock implementations.

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