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EV-DO

EVDO(EV-DO)实际上是三个单词的缩写:Evolution(演进)、DataOnly。其全称为:CDMA20001xEV-DO,是CDMA20001x演进(3G)的一条路径的一个阶段。这一路径有两个发展阶段,第一阶段叫1xEV-DO,即“DataOnly”,它可以使运营商利用一个与IS-95或CDMA2000相同频宽的CDMA载频就可实现高达2.4Mbps的前向数据传输速率,已被国际电联ITU接纳为国际3G标准,并已具备商用化条件。第二阶段叫1xEV-DV。1xEV-DV意为“DataandVoice”,它可以在一个CDMA载频上同时支持话音和数据。
  • PC机之间串口通信的实现

    PC机之间串口通信的实现一、实验目的 1.熟悉微机接口实验装置的结构和使用方法。 2.掌握通信接口芯片8251和8250的功能和使用方法。 3.学会串行通信程序的编制方法。 二、实验内容与要求 1.基本要求主机接收开关量输入的数据(二进制或十六进制),从键盘上按“传输”键(可自行定义),就将该数据通过8251A传输出去。终端接收后在显示器上显示数据。具体操作说明如下:(1)出现提示信息“start with R in the board!”,通过调整乒乓开关的状态,设置8位数据;(2)在小键盘上按“R”键,系统将此时乒乓开关的状态读入计算机I中,并显示出来,同时显示经串行通讯后,计算机II接收到的数据;(3)完成后,系统提示“do you want to send another data? Y/N”,根据用户需要,在键盘按下“Y”键,则重复步骤(1),进行另一数据的通讯;在键盘按除“Y”键外的任意键,将退出本程序。2.提高要求 能够进行出错处理,例如采用奇偶校验,出错重传或者采用接收方回传和发送方确认来保证发送和接收正确。 三、设计报告要求 1.设计目的和内容 2.总体设计 3.硬件设计:原理图(接线图)及简要说明 4.软件设计框图及程序清单5.设计结果和体会(包括遇到的问题及解决的方法) 四、8251A通用串行输入/输出接口芯片由于CPU与接口之间按并行方式传输,接口与外设之间按串行方式传输,因此,在串行接口中,必须要有“接收移位寄存器”(串→并)和“发送移位寄存器”(并→串)。能够完成上述“串←→并”转换功能的电路,通常称为“通用异步收发器”(UART:Universal Asynchronous Receiver and Transmitter),典型的芯片有:Intel 8250/8251。8251A异步工作方式:如果8251A编程为异步方式,在需要发送字符时,必须首先设置TXEN和CTS#为有效状态,TXEN(Transmitter Enable)是允许发送信号,是命令寄存器中的一位;CTS#(Clear To Send)是由外设发来的对CPU请求发送信号的响应信号。然后就开始发送过程。在发送时,每当CPU送往发送缓冲器一个字符,发送器自动为这个字符加上1个起始位,并且按照编程要求加上奇/偶校验位以及1个、1.5个或者2个停止位。串行数据以起始位开始,接着是最低有效数据位,最高有效位的后面是奇/偶校验位,然后是停止位。按位发送的数据是以发送时钟TXC的下降沿同步的,也就是说这些数据总是在发送时钟TXC的下降沿从8251A发出。数据传输的波特率取决于编程时指定的波特率因子,为发送器时钟频率的1、1/16或1/64。当波特率指定为16时,数据传输的波特率就是发送器时钟频率的1/16。CPU通过数据总线将数据送到8251A的数据输出缓冲寄存器以后,再传输到发送缓冲器,经移位寄存器移位,将并行数据变为串行数据,从TxD端送往外部设备。在8251A接收字符时,命令寄存器的接收允许位RxE(Receiver Enable)必须为1。8251A通过检测RxD引脚上的低电平来准备接收字符,在没有字符传送时RxD端为高电平。8251A不断地检测RxD引脚,从RxD端上检测到低电平以后,便认为是串行数据的起始位,并且启动接收控制电路中的一个计数器来进行计数,计数器的频率等于接收器时钟频率。计数器是作为接收器采样定时,当计数到相当于半个数位的传输时间时再次对RxD端进行采样,如果仍为低电平,则确认该数位是一个有效的起始位。若传输一个字符需要16个时钟,那么就是要在计数8个时钟后采样到低电平。之后,8251A每隔一个数位的传输时间对RxD端采样一次,依次确定串行数据位的值。串行数据位顺序进入接收移位寄存器,通过校验并除去停止位,变成并行数据以后通过内部数据总线送入接收缓冲器,此时发出有效状态的RxRDY信号通知CPU,通知CPU8251A已经收到一个有效的数据。一个字符对应的数据可以是5~8位。如果一个字符对应的数据不到8位,8251A会在移位转换成并行数据的时候,自动把他们的高位补成0。 五、系统总体设计方案根据系统设计的要求,对系统设计的总体方案进行论证分析如下:1.获取8位开关量可使用实验台上的8255A可编程并行接口芯片,因为只要获取8位数据量,只需使用基本输入和8位数据线,所以将8255A工作在方式0,PA0-PA7接实验台上的8位开关量。2.当使用串口进行数据传送时,虽然同步通信速度远远高于异步通信,可达500kbit/s,但由于其需要有一个时钟来实现发送端和接收端之间的同步,硬件电路复杂,通常计算机之间的通信只采用异步通信。3.由于8251A本身没有时钟,需要外部提供,所以本设计中使用实验台上的8253芯片的计数器2来实现。4:显示和键盘输入均使用DOS功能调用来实现。设计思路框图,如下图所示: 六、硬件设计硬件电路主要分为8位开关量数据获取电路,串行通信数据发送电路,串行通信数据接收电路三个部分。1.8位开关量数据获取电路该电路主要是利用8255并行接口读取8位乒乓开关的数据。此次设计在获取8位开关数据量时采用8255令其工作在方式0,A口输入8位数据,CS#接实验台上CS1口,对应端口为280H-283H,PA0-PA7接8个开关。2.串行通信电路串行通信电路本设计中8253主要为8251充当频率发生器,接线如下图所示。

    标签: PC机 串口通信

    上传时间: 2013-12-19

    上传用户:小火车啦啦啦

  • Input Signal Rise and Fall Tim

    All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.

    标签: Signal Input Fall Rise

    上传时间: 2013-10-23

    上传用户:copu

  • I2C slave routines for the 87L

    The 87LPC76X Microcontroller combines in a small package thebenefits of a high-performance microcontroller with on-boardhardware supporting the Inter-Integrated Circuit (I2C) bus interface.The 87LPC76X can be programmed both as an I2C bus master, aslave, or both. An overview of the I2C bus and description of the bussupport hardware in the 87LPC76X microcontrollers appears inapplication note AN464, Using the 87LPC76X Microcontroller as anI2C Bus Master. That application note includes a programmingexample, demonstrating a bus-master code. Here we show anexample of programming the microcontroller as an I2C slave.The code listing demonstrates communications routines for the87LPC76X as a slave on the I2C bus. It compliments the program inAN464 which demonstrates the 87LPC76X as an I2C bus master.One may demonstrate two 87LPC76X devices communicating witheach other on the I2C bus, using the AN464 code in one, and theprogram presented here in the other. The examples presented hereand in AN464 allow the 87LPC76X to be either a master or a slave,but not both. Switching between master and slave roles in amultimaster environment is described in application note AN435.The software for a slave on the bus is relatively simple, as theprocessor plays a relatively passive role. It does not initiate bustransfers on its own, but responds to a master initiating thecommunications. This is true whether the slave receives or transmitsdata—transmission takes place only as a response to a busmaster’s request. The slave does not have to worry about arbitrationor about devices which do not acknowledge their address. As theslave is not supposed to take control of the bus, we do not demandit to resolve bus exceptions or “hangups”. If the bus becomesinactive the processor simply withdraws, not interfering with themaster (or masters) on the bus which should (hopefully) try toresolve the situation.

    标签: routines slave I2C 87L

    上传时间: 2013-11-19

    上传用户:shirleyYim

  • 用单片机设计发音电路

    本文介绍使用AT89C2051 制作的一种发音电路, 各种声音通过编程实现, 灵活方便。原理图如图1 所示。图1 发音电路原理该电路利用方波谐波成份丰富的特点,编程采用计时器延迟法发音, 即每个音的半周期计时中断一次, 而使输出P110 (或其他IöO 口) 反相, 重复执行产生某种频率的信号。例如: 中音DO 的频率为523Hz, 其周期为1912Ls, 半周期为956Ls, 若初始P110= 1, 经956Ls 后应使P110= 0, 再经956Ls 恢复P110= 1, 这样就可发出中音DO。

    标签: 用单片机 发音 电路

    上传时间: 2013-10-11

    上传用户:Altman

  • avr单片机c语言

    第1章 单片机系统概述1.1 AVR系列单片机的特点1.2 AT90系列单片机简介第2章 AT90LS8535单片机的基础知识2.1 AT90LS8535单片机的总体结构2.1.1 AT90LS8535单片机的中央处理器2.1.2 AT90LS8535单片机的存储器组织2.1.3 AT90LS8535单片机的I/O接口2.1.4 AT90LS8535单片机的内部资源2.1.5 AT90LS8535单片机的时钟电路2.1.6 AT90LS8535单片机的系统复位2.1.7 AT90LS8535单片机的节电方式2.1.8 AT90LS8535单片机的芯片引脚2.2 AT90LS8535单片机的指令系统2.2.1 汇编指令格式2.2.2 寻址方式2.2.3 伪指令2.2.4 指令类型及数据操作方式2.3 应用程序设计2.3.1 程序设计方法2.3.2 应用程序举例第3章 AT90LS8535单片机的C编程3.1 支持高级语言编程的AVR系列单片机3.2 AVR的C编译器3.3 ICC AVR介绍3.3.1 安装ICC AVR3.3.2 设置ICC AVR3.4 用ICC AVR编写应用程序3.5 下载程序文件第4章 数据类型、运算符和表达式4.1 ICC AVR支持的数据类型4.2 常量与变量4.2.1 常量4.2.2 变量4.3 AT90LS8535的存储空间4.4 算术和赋值运算4.4.1 算术运算符和算术表达式4.4.2 赋值运算符和赋值表达式4.5 逻辑运算4.6 关系运算4.7 位操作4.7.1 位逻辑运算4.7.2 移位运算4.8 逗号运算第5章 控制流5.1 C语言的结构化程序设计5.1.1 顺序结构5.1.2 选择结构5.1.3 循环结构5.2 选择语句5.2.1 if语句5.2.2 switch分支5.2.3 选择语句的嵌套5.3 循环语句5.3.1 while语句5.3.2 do…while语句5.3.3 for语句5.3.4 循环语句嵌套5.3.5 break语句和continue语句第6章 函数6.1 函数的定义6.1.1 函数的定义的一般形式6.1.2 函数的参数6.1.3 函数的值6.2 函数的调用6.2.1 函数的一般调用6.2.2 函数的递归调用6.2.3 函数的嵌套使用6.3 变量的类型及其存储方式6.3.1 局部变量6.3.2 局部变量的存储方式6.3.3 全局变量6.3.4 全局变量的存储方式6.4 内部函数和外部函数6.4.1 内部函数6.4.2 外部函数第7章 指针第8章 结构体和共用体第9章 AT90LS8535的内部资源第10章 AT90LS8535的人机接口编程第11章 AT90LS8535的外围扩展第12章 AT90LS8535的通信编程第13章 系统设计中的程序处理方法

    标签: avr 单片机c语言

    上传时间: 2013-10-31

    上传用户:smthxt

  • 三相SPWM波在TMS320F28335中的实现

    载波相移正弦脉宽调制(SPWM)技术是一种适用于大功率电力开关变换装置的高性能开关调制策略,在有源电力滤波器中有良好的应用前景。本文介绍了如何利用高性能数字信号处理器TMS320F28335的片内外设事件管理器(EV)模块产生三相SPWM波,给出了程序流程图及关键程序源码。该方法采用不对称规则采样算法,参数计算主要采用查表法,计算量小,实时性高。在工程实践中表明,该方法既能满足控制精度要求,又能满足实时性要求,可以很好地控制逆变电源的输出。

    标签: F28335 28335 SPWM 320F

    上传时间: 2013-11-05

    上传用户:tzrdcaabb

  • 便携式超声系统中的Xilinx器件

    There has long been a need for portable ultrasoundsystems that have good resolution at affordable costpoints. Portable systems enable healthcare providersto use ultrasound in remote locations such asdisaster zones, developing regions, and battlefields,where it was not previously practical to do so.

    标签: Xilinx 便携式 超声系统 器件

    上传时间: 2013-10-26

    上传用户:liulinshan2010

  • CPLD和FPGA设计介绍

    Field Programmable Gate Arrays (FPGAs) are becoming a critical part of every system design. Many vendors offer many different architectures and processes. Which one is right for your design? How do you design one of these so that it works correctly and functions as you expect in your entire system? These are the questions that this paper sets out to answer.

    标签: CPLD FPGA

    上传时间: 2013-10-29

    上传用户:lixqiang

  • UART 4 UART参考设计,Xilinx提供VHDL代码

    UART 4 UART参考设计,Xilinx提供VHDL代码 uart_vhdl This zip file contains the following folders:  \vhdl_source  -- Source VHDL files:      uart.vhd  - top level file      txmit.vhd - transmit portion of uart      rcvr.vhd -  - receive portion of uart \vhdl_testfixture  -- VHDL Testbench files. This files only include the testbench behavior, they         do not instantiate the DUT. This can easily be done in a top-level VHDL          file or a schematic. This folder contains the following files:      txmit_tb.vhd  -- Test bench for txmit.vhd.      rcvr_tf.vhd  -- Test bench for rcvr.vhd.

    标签: UART Xilinx VHDL 参考设计

    上传时间: 2013-11-07

    上传用户:jasson5678

  • LabVIEW for Everyone(经典英文书籍)

    The #1 Step-by-Step Guide to labviewNow Completely Updated for labview 8!   Master labview 8 with the industry's friendliest, most intuitive tutorial: labview for Everyone, Third Edition. Top labview experts Jeffrey Travis and Jim Kring teach labview the easy way: through carefully explained, step-by-step examples that give you reusable code for your own projects!   This brand-new Third Edition has been fully revamped and expanded to reflect new features and techniques introduced in labview 8. You'll find two new chapters, plus dozens of new topics, including Project Explorer, AutoTool, XML, event-driven programming, error handling, regular expressions, polymorphic VIs, timed structures, advanced reporting, and much more. Certified labview Developer (CLD) candidates will find callouts linking to key objectives on NI's newest exam, making this book a more valuable study tool than ever. Not just what to d why to do it! Use labview to build your own virtual workbench Master labview's foundations: wiring, creating, editing, and debugging VIs; using controls and indicators; working with data structures; and much more Learn the "art" and best practices of effective labview development NEW: Streamline development with labview Express VIs NEW: Acquire data with NI-DAQmx and the labview DAQmx VIs NEW: Discover design patterns for error handling, control structures, state machines, queued messaging, and more NEW: Create sophisticated user interfaces with tree and tab controls, drag and drop, subpanels, and more Whatever your application, whatever your role, whether you've used labview or not, labview for Everyone, Third Edition is the fastest, easiest way to get the results you're after!

    标签: Everyone LabVIEW for 英文

    上传时间: 2013-10-14

    上传用户:shawvi