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XAPP143-利用Verilog来创建CPLD设计

  • 资源大小:196 K
  • 上传时间: 2013-11-11
  • 上传用户:myangcheng
  • 资源积分:2 下载积分
  • 标      签: Verilog XAPP CPLD 143

资 源 简 介

This Application Note covers the basics of how to use Verilog as applied to ComplexProgrammable Logic Devices. Various combinational logic circuit examples, such asmultiplexers, decoders, encoders, comparators and adders are provided. Synchronous logiccircuit examples, such as counters and state machines are also provided.

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