As we enter the next millennium, there are clear technological patterns. First, the
electronic industry continues to scale microelectronic structures to achieve faster
devices, new devices, or more per unit area. Secondly, electrostatic charge, electrostatic
discharge (ESD), electrical overstress (EOS) and electromagnetic emissions (EMI)
continue to be a threat to these scaled structures. This dichotomy presents a dilemma
for the scaling of semiconductor technologies and a future threat to new technologies.
Technological advancements, material changes, design techniques, and simulation can
fend off this growing concern – but to maintain this ever-threatening challenge, one must
continue to establish research and education in this issue.
